Count the 0, 1, x and z bits in a sampled bus value without losing a single unknown.
Hardware context: Ready/valid response channel during reset and initialization. Count unknown and high-impedance bits in a captured hardware bus sample.
A reset-value test passed for weeks while a register held x, because the monitor copied the bus into an int. Before you trust a sample, you want to know how much of it is real.
Write count_states(sample, width). Look at the lowest width bits of sample and count how many are 0, how many are 1, how many are x and how many are z. Return the four counts in one 32-bit word: zeros in the top byte, then ones, then x, then z in the bottom byte.
For sample = 4'b10xz and width = 4, every state appears once, so the answer is one zero, one one, one x and one z.
The sample must stay four-state while you look at it. One copy into a bit or an int turns every x and z into 0, and your counts would report a clean bus.
Signals in the timeline
| Signal | Width | Role |
|---|---|---|
sample | 32 | input of each check |
width | 32 | input of each check |
Full specification
function automatic logic [31:0] count_states(input logic [31:0] sample, input int width);
| Bits of the result | Holds |
|---|---|
| 31:24 | number of 0 bits |
| 23:16 | number of 1 bits |
| 15:8 | number of x bits |
| 7:0 | number of z bits |
Only bits 0 to width - 1 of sample count. Bits at width and above are ignored, whatever they hold.
width is between 0 and 32. With width = 0 no bit counts, so the result is 0.
Examples
Example 1
One of each state- Input
sample = 4'b10xz, width = 4
- Output
zeros = 1, ones = 1, xs = 1, zs = 1
Bit 3 is 1, bit 2 is 0, bit 1 is x and bit 0 is z, so each count is 1.
Example 2
Every bit is unknown- Input
sample = 4'bxxxx, width = 4
- Output
zeros = 0, ones = 0, xs = 4, zs = 0
All four active bits are x. A two-state copy would have reported four zeros instead.
Example 3
No active bits- Input
sample = 4'bzzzz, width = 0
- Output
zeros = 0, ones = 0, xs = 0, zs = 0
width = 0 means no bit counts, so all four counts are 0 even though the sample holds z.
Constraints and contract
- width is 0 to 32; sample may hold 0, 1, x and z in any bit.
- Each count is at most 32, so it always fits in its byte.
- Keep the function name, the argument types and the 32-bit return type.
Hints
Hint 1
Visit the active bits one at a time. What type must the bit you look at have, so that x and z are still there when you look?
Hint 2
One statement can tell all four states of a single bit apart, as long as it compares exactly instead of treating x as "don't know".
Hint 3
Start all four counters at zero on every call. When the loop ends, join the low eight bits of each counter in the order zeros, ones, x, z.
What this judge verifies: Your function is called on every 4-bit pattern of 0, 1, x and z, on every width from 0 to 32 and on uniform 32-bit samples. Passing shows the counts are right on these inputs.
296 checks on Icarus Verilog · browser. Run the examples first, then check the full regression. The suite is local and inspectable. A passing result establishes the tested cases, not a proof for all possible inputs.
See all 9 steps and the final capstone