Choose the hold capacitor of a 12-bit sampler: its kT/C noise must stay under half an LSB at 125 °C, and it must still settle through the switch within 4 ns at the slow corner.
Circuit context: The hold capacitor of a 12-bit sampler with a 1 V range, behind a fixed NMOS switch (4/0.15). Size the hold capacitor of a 12-bit sampler.
A sampler for a 12-bit converter with a 1 V input range holds each sample on a capacitor C_H behind an NMOS switch (W = 4 µm, L = 0.15 µm, gate at 1.8 V when on). One LSB is 1 V / 4096 = 244.1 µV.
Two rules fix C_H. The noise the switch freezes on it, √(kT/C_H), must stay below half an LSB, 122.07 µV rms, over the whole temperature range up to 125 °C. And while the switch is closed, the hold node must follow a step from 0.2 V to 0.8 V to within half an LSB in 4 ns, at the slow corner too.
The previous, 10-bit version of this sampler used 100 fF. Replace it: the subcircuit hold is the capacitor alone (one or more capacitors from top to ground).
What the grader measures
Your subcircuit hold (ports top) under the grader's own bench, one run per corner (tt, ss):
| Check | Corner | Rule |
|---|---|---|
| Noise on C_H at 125 °C | tt | ≤ 122.1 µV |
| Noise on C_H at 27 °C | tt | ≤ 122.1 µV |
| Settling to ½ LSB at 125 °C | ss | ≤ 4 ns |
| Settling to ½ LSB at 125 °C | tt | ≤ 4 ns |
Full specification
.subckt hold top
* capacitors only
.ends
| Check | Corner | Rule | How the grader measures it |
|---|---|---|---|
| Noise on C_H at 125 °C | tt | ≤ 122.07 µV rms | noise analysis of v(top) with the switch closed, 0.8 V in, 1 Hz to 1 THz: onoise_total |
| Noise on C_H at 27 °C | tt | ≤ 122.07 µV rms | the same at 27 °C |
| Settling to ½ LSB at 125 °C | ss | ≤ 4 ns | tran: the hold node starts at 0.2 V, 0.8 V on the input; the time from the switch's gate edge until |v(top) − 0.8 V| stays below 122.07 µV |
| Settling to ½ LSB at 125 °C | tt | ≤ 4 ns | as at ss |
The grader runs its bench twice, with .lib sky130 tt and ss. Its switch is the one in your netlist's own bench; only the subcircuit hold changes.
Examples
Example 1
The starter: 100 fF- Design
.subckt hold top CH top 0 100f .ends
- Measured by the grader
Noise on C_H at 125 °C: 216.6 µV (needs ≤ 122.1 µV) Noise on C_H at 27 °C: 186.7 µV (needs ≤ 122.1 µV) Settling to ½ LSB at 125 °C at ss: 931 ps (needs ≤ 4 ns) Settling to ½ LSB at 125 °C: 739.9 ps (needs ≤ 4 ns)
Fast, but the noise is 217 µV at 125 °C: almost a whole LSB instead of half.
Example 2
278 fF, the 12-bit number at 27 °C- Design
.subckt hold top CH top 0 278f .ends
- Measured by the grader
Noise on C_H at 125 °C: 130.8 µV (needs ≤ 122.1 µV) Noise on C_H at 27 °C: 112.8 µV (needs ≤ 122.1 µV) Settling to ½ LSB at 125 °C at ss: 2.484 ns (needs ≤ 4 ns) Settling to ½ LSB at 125 °C: 1.962 ns (needs ≤ 4 ns)
Inside the limit at room temperature (112.8 µV), 7 % over it at 125 °C (130.8 µV): kT grows by a third between 27 °C and 125 °C.
Example 3
1 pF- Design
.subckt hold top CH top 0 1p .ends
- Measured by the grader
Noise on C_H at 125 °C: 69.18 µV (needs ≤ 122.1 µV) Noise on C_H at 27 °C: 59.63 µV (needs ≤ 122.1 µV) Settling to ½ LSB at 125 °C at ss: 8.783 ns (needs ≤ 4 ns) Settling to ½ LSB at 125 °C: 6.919 ns (needs ≤ 4 ns)
Quiet, but 8.8 ns to settle at ss: the switch cannot charge it in time.
Constraints and contract
- The netlist defines .subckt hold top ... .ends exactly once, with this port.
- Inside hold: capacitors only, with comments and .param lines.
- The grader writes the .lib line for each corner itself; everything outside hold is replaced by its bench.
Hints
Hint 1
kT/C does not care about the switch's resistance (lesson E7.2): only C_H and the temperature set it. Which end of the temperature range needs the larger capacitor?
Hint 2
C ≥ kT / v_n². With v_n = 122.07 µV that is 278 fF at 300 K and 369 fF at 398 K.
Hint 3
The switch and C_H form an RC: settling to half an LSB of a 0.6 V step takes ln(0.6 V / 122 µV) ≈ 8.5 time constants. The slow corner and the hot end give the largest R_on, so the settling limit caps C_H from above.
What the grader checks: The grader places hold behind its own switch (NMOS 4/0.15, gate at 1.8 V) and measures the total output noise from 1 Hz to 1 THz at 27 °C and 125 °C, and the settling of a 0.2 V to 0.8 V step at 125 °C, at tt and ss, on ngspice 42 (libngspice0 42+ds-3build1) with the pinned SKY130 models, measured 2026-11-03 with tools/spice-judge.mjs. It proves those numbers for that switch and those levels; it does not check charge injection, the hold step or leakage.
Run simulates your netlist as written, with your own analyses and measurements. Submit sends it to the grader, which keeps only the subcircuit hold and makes 2 ngspice runs. The numbers come from ngspice and the SKY130 models the site pins; they prove the measured cases, not every condition a chip meets.
See all 1 steps and the final capstone