Packed vs unpacked arrays

Dimensions before and after the name

An array declaration can have dimensions on both sides of the variable name, and the side decides how the bits are stored.

Dimensions before the name are packed, which means the whole array is one contiguous vector of bits. logic [3:0][7:0] lanes; is a single 32-bit value, split into four 8-bit fields.

Dimensions after the name are unpacked, which means the array is a collection of separate elements. logic [7:0] rx [0:3]; holds four bytes, named rx[0] to rx[3].

The C-style size in logic [7:0] rx [4]; means the same as [0:3]. That short form is only allowed for unpacked dimensions, so packed dimensions always use a range such as [3:0].

Which index holds the most significant byte

In a packed array, the left index of the declared range is the most significant. For logic [3:0][7:0] lanes, lanes[3] holds bits 31 to 24 and lanes[0] holds bits 7 to 0.

Declare the range ascending, as in logic [0:3][7:0] w, and the order flips so that w[0] is the most significant byte. Both forms are legal, so pick one style per project and keep to it.

Unpacked indexes carry no significance at all, because rx[0] is simply the first element. Trouble starts when you copy between the two kinds and assume that index 0 means the same thing in both.

// rx[0] arrived first and is the MSB
foreach (rx[i])
  lanes[i] = rx[i];
// lanes == 32'hefbeadde

// rx[0] arrived first and is the MSB
foreach (rx[i])
  lanes[3-i] = rx[i];
// lanes == 32'hdeadbeef

What each kind can do

A packed array behaves like a plain vector: you can add to it, compare it with ==, shift it, and assign it to a logic [31:0] without a cast.

An unpacked array is not a number, so you read and write it one element at a time or loop over it with foreach. Memories, FIFOs and lists of samples are natural unpacked arrays.

Reading an unpacked array out of range does not stop the simulation. Instead, a read of rx[4] returns the element type's default value, which is 8'hxx for a logic element, so a bad index looks like bad data.

Two system functions answer size questions about these arrays. $bits(lanes) returns the total number of bits, 32, and $size(rx) returns the number of elements in a dimension, 4.

Memories use both kinds at once

A memory model is the most common mix of the two kinds. logic [31:0] mem [0:1023]; is an unpacked array of 1,024 elements, each a packed 32-bit word, for 4 KB of storage in total.

When you index it, the unpacked index comes first and the packed index second. mem[5] is word 5, and mem[5][15:8] is bits 15 to 8 of that word, which is its byte 1.

The split matches the hardware: you load and store whole words by address, so the address is the unpacked index. Each word is then taken apart into bytes and bits, so the word itself is packed.

A packed word can have two packed dimensions of its own. With logic [3:0][7:0] mem [0:1023];, the expression mem[5][1] selects byte 1 of word 5 directly, with no bit ranges to get wrong.

Slicing a vector with +:

A part-select such as word[15:8] picks a fixed range of bits, and both of its bounds must be constants. When the position changes at run time, you need an indexed part-select instead.

word[base +: 8] selects 8 bits, starting at bit base and counting up, while word[base -: 8] starts at base and counts down. The width must be a constant, but base can be any expression.

So word[k*8 +: 8] extracts byte k, with byte 0 at the least significant end, and that single line replaces a four-way case statement.

The tempting alternative, word[k*8+7 : k*8], does not compile, even though its two bounds always differ by exactly 7. The +: form exists for this situation.

Watch the top end, though. If base is 12 in a 16-bit logic vector, word[base +: 8] asks for bits 19 to 12, and the four bits above 15 come back as x. Check the index range before you slice, or the unknown bits will travel into your scoreboard.

Try it

The first copy reverses the word, as in the opening story. The second maps the first byte to lanes[3] and gives the intended value.

The fixed and indexed part-selects pick the same 8 bits. The last line reads past the end of rx and gets xx. Try idx = -1 and predict the result before you run it.

Check yourself

module tb;
  logic [0:3][7:0] w;
  initial begin
    w = 32'h11223344;
    $display("%h %h", w[0], w[3]);
  end
endmodule

return w[(3-k)*8 +: 8];

return w[k*8 +: 8];

return w >> (k*8);

return w[k*8+7 -: 8];

Practice

• Byte-lane extraction Implement · Easy