Density and congestion
Choose a target density against the utilization, read a global-route congestion map and its overflow, and identify regions needing closer routing checks.
- Lesson
- L4.2
- Time
- 30 min
- Runs on
- OpenROAD
- Check
- 5 questions
The FIFO placed at target density 0.95 had 18.0 % less wirelength after global placement than at 0.6. The router still needed 2.1 % more wire for it, with peak normalized map usage 57.1 % against 51.2 %.
| Target density | HPWL, global placement | HPWL, legal | Routed wirelength | Peak map usage | Overflow |
|---|---|---|---|---|---|
| 0.6 | 6244 µm | 7081 µm | 18326 µm | 51.2 % | 0 |
| 0.95 | 5119 µm | 6963 µm | 18719 µm | 57.1 % | 0 |
R5.2's FIFO, 16 × 8 bits, 40 % utilization, through global routing with OpenROAD 26Q2 on sky130hd. Both layouts are drawn below.
A placer that packs cells tight wins on its own measure and moves the cost to the router.
Target density and utilization
Utilization is the fraction of the whole core that cells fill, chosen at the floorplan: 41.9 % here, taps included. The target density (global_placement -density) is a desired fill for each small bin. A density penalty discourages excess; the stopping criterion allows residual overflow.
A target below the average utilization cannot be met everywhere. This lab requires a target above the requested utilization to leave spreading room; OpenROAD may also raise it for fixed obstacles. At a density just above the utilization, the cells spread almost evenly over the core. A higher target permits clustering around connected nets. That can shorten wires and concentrate routing demand.
- Tap cells
- Logic
- Buffers and inverters
- Flip-flops
- Clock tree
- Routing usage per GCell: under 30 %, 30-60 %, 60-90 %, 90 % or more
- I/O pins
- Stage
- Floorplan
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Worst max slack
- 1.9534 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4241 ns
- Stage
- Global placement
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Wirelength (HPWL)
- 5,119 µm
- Worst max slack
- 0.4853 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4574 ns
- Overflow
- 0.0986
- Stage
- Detailed placement
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Wirelength (HPWL)
- 6,963 µm
- Worst max slack
- 0.2766 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4737 ns
- Stage
- Clock tree
- Cell area
- 6,082.1 µm²
- Utilization
- 44.3 %
- Wirelength (HPWL)
- 8,369 µm
- Worst max slack
- 0.1792 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4874 ns
- Clock skew
- −0.0166 ns
- Stage
- Global route
- Cell area
- 6,082.1 µm²
- Utilization
- 44.3 %
- Wirelength (HPWL)
- 8,369 µm
- Routed wirelength
- 18,719 µm
- Worst max slack
- −0.3498 ns
- Total negative max slack
- −1.0230 ns
- Worst min slack
- 0.4977 ns
- Routing usage
- 15.9 %
- Overflow
- 0
- Global placement
Dense clusters with empty core between them. HPWL 5119 µm.
- Legal
Legalizing the dense clusters moves cells up to 18.37 µm, and HPWL grows to 6963 µm.
- Congestion
Usage per GCell after global routing. The hottest GCell, at x 55.2 µm and y 13.8 µm, reaches 57.1 %.
Read the layout as text
sync_fifo: die 127.56 × 127.56 µm, core 117.30 × 116.96 µm, 43 rows of 2.72 µm, 23 signal pins.
| Stage | Cell area | Utilization | Wirelength (HPWL) | Routed wirelength | Worst max slack | Total negative max slack | Worst min slack | Clock skew | Routing usage | Overflow | Cells placed |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Floorplan | 5,753.0 µm² | 41.9 % | — | — | 1.9534 ns | 0.0000 ns | 0.4241 ns | — | — | — | 180 tap cells; I/O pins not placed yet |
| Global placement | 5,753.0 µm² | 41.9 % | 5,119 µm | — | 0.4853 ns | 0.0000 ns | 0.4574 ns | — | — | 0.0986 | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops |
| Detailed placement | 5,753.0 µm² | 41.9 % | 6,963 µm | — | 0.2766 ns | 0.0000 ns | 0.4737 ns | — | — | — | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops |
| Clock tree | 6,082.1 µm² | 44.3 % | 8,369 µm | — | 0.1792 ns | 0.0000 ns | 0.4874 ns | −0.0166 ns | — | — | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops, 32 clock tree |
| Global route | 6,082.1 µm² | 44.3 % | 8,369 µm | 18,719 µm | −0.3498 ns | −1.0230 ns | 0.4977 ns | — | 15.9 % | 0 | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops, 32 clock tree |
OpenROAD 26Q2 on sky130hd, fifo8, 40 % utilization, density 0.95. Same colour scale as the 0.6 layout.
This platform's flow uses 0.6 by default (PLACE_DENSITY in its config.mk).
Supply and demand of routing tracks
The global router chooses coarse paths, before detailed routing selects legal shapes and vias. It divides the die into a grid of GCells, squares 6.9 µm on a side in this run, and decides which GCells each net passes through.
Capacity
The tracks (L1.5) that cross a GCell edge on each layer. A 6.9 µm edge on met3, with its 0.68 µm pitch, has roughly 10 tracks across it; exact counts also depend on track offsets and obstructions.
Adjustment
The platform's fastroute.tcl sets a layer adjustment of 0.2: the router plans with 20 % fewer tracks and leaves them to the detailed router. 10 tracks become 8.
Demand
The nets the router sends across that edge, one track each.
Overflow
Demand above capacity on an edge. Each extra net counts once, and the router reports the total per layer.
Congestion is demand close to or above supply. The map in the layout colours each GCell by its usage: route steps normalized by average edge capacity across all layers. It is a visualization, not an exact local-capacity report. This display aggregates layers and directions: a cool square can hide an overloaded edge or layer. Read the edge-overflow report as well. Overflow left after global routing usually turns into detours, extra delay, or shorts and spacing errors in detailed routing (L6).
Reading the congestion map
At density 0.95 the busiest GCell holds 3 nand2b_1, 1 o2111ai_1, 1 nor2_1. At 0.6 the busiest one reaches 51.2 % and holds 1 and4_1, 1 nand3_1, 1 nor2_1.
The same FIFO at target density 0.6
- Tap cells
- Logic
- Buffers and inverters
- Flip-flops
- Clock tree
- Routing usage per GCell: under 30 %, 30-60 %, 60-90 %, 90 % or more
- I/O pins
- Stage
- Floorplan
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Worst max slack
- 1.9534 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4241 ns
- Stage
- Global placement
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Wirelength (HPWL)
- 6,244 µm
- Worst max slack
- 0.2871 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4537 ns
- Overflow
- 0.0995
- Stage
- Detailed placement
- Cell area
- 5,753.0 µm²
- Utilization
- 41.9 %
- Wirelength (HPWL)
- 7,081 µm
- Worst max slack
- 0.1526 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4575 ns
- Stage
- Clock tree
- Cell area
- 6,129.6 µm²
- Utilization
- 44.7 %
- Wirelength (HPWL)
- 7,845 µm
- Worst max slack
- 0.1250 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4838 ns
- Clock skew
- 0.0078 ns
- Stage
- Global route
- Cell area
- 6,129.6 µm²
- Utilization
- 44.7 %
- Wirelength (HPWL)
- 7,845 µm
- Routed wirelength
- 18,326 µm
- Worst max slack
- −0.2591 ns
- Total negative max slack
- −0.6919 ns
- Worst min slack
- 0.5256 ns
- Routing usage
- 16.2 %
- Overflow
- 0
- Global placement
Wider clusters. HPWL 6244 µm.
- Congestion
The hottest GCell reaches 51.2 %.
Read the layout as text
sync_fifo: die 127.56 × 127.56 µm, core 117.30 × 116.96 µm, 43 rows of 2.72 µm, 23 signal pins.
| Stage | Cell area | Utilization | Wirelength (HPWL) | Routed wirelength | Worst max slack | Total negative max slack | Worst min slack | Clock skew | Routing usage | Overflow | Cells placed |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Floorplan | 5,753.0 µm² | 41.9 % | — | — | 1.9534 ns | 0.0000 ns | 0.4241 ns | — | — | — | 180 tap cells; I/O pins not placed yet |
| Global placement | 5,753.0 µm² | 41.9 % | 6,244 µm | — | 0.2871 ns | 0.0000 ns | 0.4537 ns | — | — | 0.0995 | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops |
| Detailed placement | 5,753.0 µm² | 41.9 % | 7,081 µm | — | 0.1526 ns | 0.0000 ns | 0.4575 ns | — | — | — | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops |
| Clock tree | 6,129.6 µm² | 44.7 % | 7,845 µm | — | 0.1250 ns | 0.0000 ns | 0.4838 ns | 0.0078 ns | — | — | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops, 32 clock tree |
| Global route | 6,129.6 µm² | 44.7 % | 7,845 µm | 18,326 µm | −0.2591 ns | −0.6919 ns | 0.5256 ns | — | 16.2 % | 0 | 180 tap cells, 9 buffers and inverters, 182 logic, 147 flip-flops, 32 clock tree |
OpenROAD 26Q2 on sky130hd, fifo8, 40 % utilization, density 0.6.
Average usage is about the same in both runs, 16.22 % and 15.91 %, and the router reports zero overflow in both. Detailed routing still needs to check pin access, vias and spacing. Density moved the aggregate peak. Use it to locate regions to inspect, not to predict which particular edge will fail first.
Fixing a congested region
Possible remedies to test:
Lower the target density
Encourage the placer to spread the cluster, then remeasure wirelength and congestion.
Routability-driven placement
global_placement -routability_drivenestimates congestion during placement and inflates the cells in hot regions, so they push their neighbours away.Lower the utilization
A bigger core offers more total routing area; it does not increase tracks per unit width (L3.1).
Change the floorplan or the pins
Move pins next to the logic they feed, or open channels between macros (L3.2, L3.3).
A wide read multiplexer, where many storage bits converge on a few outputs, is a classic hotspot. Large FIFOs and register files use memory macros partly for that reason.
Asked in interviews
What is routing congestion, and how do you see it before routing?
Routing demand close to or above the tracks available in a region. Global routing, or a placement-time estimate, reports usage and overflow per GCell; a heat map shows where.
What does placement density control?
The desired cell fill of each placement bin. Allow headroom above average utilization; higher targets permit clustering, which shortens wires and concentrates routing demand.
How do you fix a congested region?
Lower the target density, use routability-driven placement or cell padding, lower the utilization, or change the floorplan and pin placement around the hotspot.
Why can the shortest-wirelength placement be the worst one?
HPWL rewards packing. Packed cells need more tracks per region than exist, so the router detours or fails, and legalization of a packed placement moves cells far.
Try it
Run the FIFO at target density 0.95 through global routing. Output lists each stage's HPWL, the routed wirelength (18719 µm) and the overflow; Layout shows the congestion map on its last stage.
Lower the density to 0.6, then raise the utilization to 60 % at density 0.95. Watch the busiest GCells, the routing usage and the overflow. Which change raises the peak more?
Run to draw the timing paths here.
Run the flow to see each stage of the layout here.
global placement HPWL 5119.4975 µm global route routed wirelength 18719 µm global route overflow 0Read the netlist: sync_fifo.v (the bundled design fifo8)
/* Generated by Yosys 0.70+290 (git sha1 e8968a4f7, Release, Clang /usr/bin/clang++ 21.1.8) */
module sync_fifo(clk, rst_n, write_en, write_data, read_en, read_data, read_valid, full, empty);
input clk;
wire clk;
input rst_n;
wire rst_n;
input write_en;
wire write_en;
input [7:0] write_data;
wire [7:0] write_data;
input read_en;
wire read_en;
output [7:0] read_data;
wire [7:0] read_data;
output read_valid;
wire read_valid;
output full;
wire full;
output empty;
wire empty;
wire _000_;
wire _001_;
wire _002_;
wire _003_;
wire _004_;
wire _005_;
wire _006_;
wire _007_;
wire _008_;
wire _009_;
wire _010_;
wire _011_;
wire _012_;
wire _013_;
wire _014_;
wire _015_;
wire _016_;
wire _017_;
wire _018_;
wire _019_;
wire _020_;
wire _021_;
wire _022_;
wire _023_;
wire _024_;
wire _025_;
wire _026_;
wire _027_;
wire _028_;
wire _029_;
wire _030_;
wire _031_;
wire _032_;
wire _033_;
wire _034_;
wire _035_;
wire _036_;
wire _037_;
wire _038_;
wire _039_;
wire _040_;
wire _041_;
wire _042_;
wire _043_;
wire _044_;
wire _045_;
wire _046_;
wire _047_;
wire _048_;
wire _049_;
wire _050_;
wire _051_;
wire _052_;
wire _053_;
wire _054_;
wire _055_;
wire _056_;
wire _057_;
wire _058_;
wire _059_;
wire _060_;
wire _061_;
wire _062_;
wire _063_;
wire _064_;
wire _065_;
wire _066_;
wire _067_;
wire _068_;
wire _069_;
wire _070_;
wire _071_;
wire _072_;
wire _073_;
wire _074_;
wire _075_;
wire _076_;
wire _077_;
wire _078_;
wire _079_;
wire _080_;
wire _081_;
wire _082_;
wire _083_;
wire _084_;
wire _085_;
wire _086_;
wire _087_;
wire _088_;
wire _089_;
wire _090_;
wire _091_;
wire _092_;
wire _093_;
wire _094_;
wire _095_;
wire _096_;
wire _097_;
wire _098_;
wire _099_;
wire _100_;
wire _101_;
wire _102_;
wire _103_;
wire _104_;
wire _105_;
wire _106_;
wire _107_;
wire _108_;
wire _109_;
wire _110_;
wire _111_;
wire _112_;
wire _113_;
wire _114_;
wire _115_;
wire _116_;
wire _117_;
wire _118_;
wire _119_;
wire _120_;
wire _121_;
wire _122_;
wire _123_;
wire _124_;
wire _125_;
wire _126_;
wire _127_;
wire _128_;
wire _129_;
wire _130_;
wire _131_;
wire _132_;
wire _133_;
wire _134_;
wire _135_;
wire _136_;
wire _137_;
wire _138_;
wire _139_;
wire _140_;
wire _141_;
wire _142_;
wire _143_;
wire _144_;
wire _145_;
wire _146_;
wire _147_;
wire _148_;
wire _149_;
wire _150_;
wire _151_;
wire _152_;
wire _153_;
wire _154_;
wire _155_;
wire _156_;
wire _157_;
wire _158_;
wire _159_;
wire _160_;
wire _161_;
wire _162_;
wire _163_;
wire _164_;
wire _165_;
wire _166_;
wire _167_;
wire _168_;
wire _169_;
wire _170_;
wire _171_;
wire _172_;
wire _173_;
wire _174_;
wire _175_;
wire _176_;
wire _177_;
wire _178_;
wire _179_;
wire _180_;
wire _181_;
wire _182_;
wire _183_;
wire _184_;
wire _185_;
wire _186_;
wire _187_;
wire \mem[0][0] ;
wire \mem[0][1] ;
wire \mem[0][2] ;
wire \mem[0][3] ;
wire \mem[0][4] ;
wire \mem[0][5] ;
wire \mem[0][6] ;
wire \mem[0][7] ;
wire \mem[10][0] ;
wire \mem[10][1] ;
wire \mem[10][2] ;
wire \mem[10][3] ;
wire \mem[10][4] ;
wire \mem[10][5] ;
wire \mem[10][6] ;
wire \mem[10][7] ;
wire \mem[11][0] ;
wire \mem[11][1] ;
wire \mem[11][2] ;
wire \mem[11][3] ;
wire \mem[11][4] ;
wire \mem[11][5] ;
wire \mem[11][6] ;
wire \mem[11][7] ;
wire \mem[12][0] ;
wire \mem[12][1] ;
wire \mem[12][2] ;
wire \mem[12][3] ;
wire \mem[12][4] ;
wire \mem[12][5] ;
wire \mem[12][6] ;
wire \mem[12][7] ;
wire \mem[13][0] ;
wire \mem[13][1] ;
wire \mem[13][2] ;
wire \mem[13][3] ;
wire \mem[13][4] ;
wire \mem[13][5] ;
wire \mem[13][6] ;
wire \mem[13][7] ;
wire \mem[14][0] ;
wire \mem[14][1] ;
wire \mem[14][2] ;
wire \mem[14][3] ;
wire \mem[14][4] ;
wire \mem[14][5] ;
wire \mem[14][6] ;
wire \mem[14][7] ;
wire \mem[15][0] ;
wire \mem[15][1] ;
wire \mem[15][2] ;
wire \mem[15][3] ;
wire \mem[15][4] ;
wire \mem[15][5] ;
wire \mem[15][6] ;
wire \mem[15][7] ;
wire \mem[1][0] ;
wire \mem[1][1] ;
wire \mem[1][2] ;
wire \mem[1][3] ;
wire \mem[1][4] ;
wire \mem[1][5] ;
wire \mem[1][6] ;
wire \mem[1][7] ;
wire \mem[2][0] ;
wire \mem[2][1] ;
wire \mem[2][2] ;
wire \mem[2][3] ;
wire \mem[2][4] ;
wire \mem[2][5] ;
wire \mem[2][6] ;
wire \mem[2][7] ;
wire \mem[3][0] ;
wire \mem[3][1] ;
wire \mem[3][2] ;
wire \mem[3][3] ;
wire \mem[3][4] ;
wire \mem[3][5] ;
wire \mem[3][6] ;
wire \mem[3][7] ;
wire \mem[4][0] ;
wire \mem[4][1] ;
wire \mem[4][2] ;
wire \mem[4][3] ;
wire \mem[4][4] ;
wire \mem[4][5] ;
wire \mem[4][6] ;
wire \mem[4][7] ;
wire \mem[5][0] ;
wire \mem[5][1] ;
wire \mem[5][2] ;
wire \mem[5][3] ;
wire \mem[5][4] ;
wire \mem[5][5] ;
wire \mem[5][6] ;
wire \mem[5][7] ;
wire \mem[6][0] ;
wire \mem[6][1] ;
wire \mem[6][2] ;
wire \mem[6][3] ;
wire \mem[6][4] ;
wire \mem[6][5] ;
wire \mem[6][6] ;
wire \mem[6][7] ;
wire \mem[7][0] ;
wire \mem[7][1] ;
wire \mem[7][2] ;
wire \mem[7][3] ;
wire \mem[7][4] ;
wire \mem[7][5] ;
wire \mem[7][6] ;
wire \mem[7][7] ;
wire \mem[8][0] ;
wire \mem[8][1] ;
wire \mem[8][2] ;
wire \mem[8][3] ;
wire \mem[8][4] ;
wire \mem[8][5] ;
wire \mem[8][6] ;
wire \mem[8][7] ;
wire \mem[9][0] ;
wire \mem[9][1] ;
wire \mem[9][2] ;
wire \mem[9][3] ;
wire \mem[9][4] ;
wire \mem[9][5] ;
wire \mem[9][6] ;
wire \mem[9][7] ;
wire \rptr_q[0] ;
wire \rptr_q[1] ;
wire \rptr_q[2] ;
wire \rptr_q[3] ;
wire \rptr_q[4] ;
wire take_r;
wire \wptr_q[0] ;
wire \wptr_q[1] ;
wire \wptr_q[2] ;
wire \wptr_q[3] ;
wire \wptr_q[4] ;
sky130_fd_sc_hd__clkinv_1 _188_ (
.A(\wptr_q[0] ),
.Y(_034_)
);
sky130_fd_sc_hd__clkinv_1 _189_ (
.A(\rptr_q[0] ),
.Y(_035_)
);
sky130_fd_sc_hd__nand2b_1 _190_ (
.A_N(\rptr_q[3] ),
.B(\wptr_q[3] ),
.Y(_044_)
);
sky130_fd_sc_hd__a222oi_1 _191_ (
.A1(\mem[15][1] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[14][1] ),
.C1(_064_),
.C2(\mem[13][1] ),
.Y(_103_)
);
sky130_fd_sc_hd__nand3_1 _192_ (
.A(\rptr_q[2] ),
.B(_102_),
.C(_103_),
.Y(_104_)
);
sky130_fd_sc_hd__a21oi_1 _193_ (
.A1(\mem[11][1] ),
.A2(_049_),
.B1(\rptr_q[2] ),
.Y(_105_)
);
sky130_fd_sc_hd__a222oi_1 _194_ (
.A1(\mem[10][1] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[8][1] ),
.C1(_064_),
.C2(\mem[9][1] ),
.Y(_106_)
);
sky130_fd_sc_hd__nand2_1 _195_ (
.A(_105_),
.B(_106_),
.Y(_107_)
);
sky130_fd_sc_hd__a21oi_1 _196_ (
.A1(_104_),
.A2(_107_),
.B1(_036_),
.Y(_108_)
);
sky130_fd_sc_hd__a21oi_1 _197_ (
.A1(\mem[2][1] ),
.A2(_060_),
.B1(\rptr_q[2] ),
.Y(_109_)
);
sky130_fd_sc_hd__a222oi_1 _198_ (
.A1(\mem[3][1] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[0][1] ),
.C1(_064_),
.C2(\mem[1][1] ),
.Y(_110_)
);
sky130_fd_sc_hd__nand2_1 _199_ (
.A(_109_),
.B(_110_),
.Y(_111_)
);
sky130_fd_sc_hd__nand2_1 _200_ (
.A(\mem[5][1] ),
.B(_064_),
.Y(_112_)
);
sky130_fd_sc_hd__o2111ai_1 _201_ (
.A1(\rptr_q[1] ),
.A2(_037_),
.B1(_042_),
.C1(_043_),
.D1(_044_),
.Y(_045_)
);
sky130_fd_sc_hd__a222oi_1 _202_ (
.A1(\mem[7][1] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[4][1] ),
.C1(_060_),
.C2(\mem[6][1] ),
.Y(_113_)
);
sky130_fd_sc_hd__nand3_1 _203_ (
.A(\rptr_q[2] ),
.B(_112_),
.C(_113_),
.Y(_114_)
);
sky130_fd_sc_hd__a21oi_1 _204_ (
.A1(_111_),
.A2(_114_),
.B1(\rptr_q[3] ),
.Y(_115_)
);
sky130_fd_sc_hd__nand2_1 _205_ (
.A(read_data[1]),
.B(_048_),
.Y(_116_)
);
sky130_fd_sc_hd__o31ai_1 _206_ (
.A1(_048_),
.A2(_108_),
.A3(_115_),
.B1(_116_),
.Y(_021_)
);
sky130_fd_sc_hd__nand2_1 _207_ (
.A(read_data[2]),
.B(_048_),
.Y(_117_)
);
sky130_fd_sc_hd__a22oi_1 _208_ (
.A1(\mem[7][2] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[4][2] ),
.Y(_118_)
);
sky130_fd_sc_hd__a22oi_1 _209_ (
.A1(\mem[6][2] ),
.A2(_060_),
.B1(_064_),
.B2(\mem[5][2] ),
.Y(_119_)
);
sky130_fd_sc_hd__nand2_1 _210_ (
.A(_118_),
.B(_119_),
.Y(_120_)
);
sky130_fd_sc_hd__a22oi_1 _211_ (
.A1(\mem[15][2] ),
.A2(_049_),
.B1(_064_),
.B2(\mem[13][2] ),
.Y(_121_)
);
sky130_fd_sc_hd__xnor2_1 _212_ (
.A(\rptr_q[4] ),
.B(\wptr_q[4] ),
.Y(_046_)
);
sky130_fd_sc_hd__a22oi_1 _213_ (
.A1(\mem[14][2] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[12][2] ),
.Y(_122_)
);
sky130_fd_sc_hd__nand2_1 _214_ (
.A(_121_),
.B(_122_),
.Y(_123_)
);
sky130_fd_sc_hd__a22oi_1 _215_ (
.A1(\mem[3][2] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[2][2] ),
.Y(_124_)
);
sky130_fd_sc_hd__a22oi_1 _216_ (
.A1(\mem[0][2] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[1][2] ),
.Y(_125_)
);
sky130_fd_sc_hd__a22oi_1 _217_ (
.A1(\mem[11][2] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[10][2] ),
.Y(_126_)
);
sky130_fd_sc_hd__a22oi_1 _218_ (
.A1(\mem[8][2] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[9][2] ),
.Y(_127_)
);
sky130_fd_sc_hd__a21oi_1 _219_ (
.A1(_126_),
.A2(_127_),
.B1(\rptr_q[2] ),
.Y(_128_)
);
sky130_fd_sc_hd__a211oi_1 _220_ (
.A1(\rptr_q[2] ),
.A2(_123_),
.B1(_128_),
.C1(_036_),
.Y(_129_)
);
sky130_fd_sc_hd__a21oi_1 _221_ (
.A1(_124_),
.A2(_125_),
.B1(\rptr_q[2] ),
.Y(_130_)
);
sky130_fd_sc_hd__a211oi_1 _222_ (
.A1(\rptr_q[2] ),
.A2(_120_),
.B1(_130_),
.C1(\rptr_q[3] ),
.Y(_131_)
);
sky130_fd_sc_hd__xor2_1 _223_ (
.A(\rptr_q[4] ),
.B(\wptr_q[4] ),
.X(_047_)
);
sky130_fd_sc_hd__o31ai_1 _224_ (
.A1(_048_),
.A2(_129_),
.A3(_131_),
.B1(_117_),
.Y(_020_)
);
sky130_fd_sc_hd__a22oi_1 _225_ (
.A1(\mem[12][3] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[13][3] ),
.Y(_132_)
);
sky130_fd_sc_hd__nand2_1 _226_ (
.A(\mem[14][3] ),
.B(_060_),
.Y(_133_)
);
sky130_fd_sc_hd__nand2_1 _227_ (
.A(\mem[15][3] ),
.B(_049_),
.Y(_134_)
);
sky130_fd_sc_hd__a22oi_1 _228_ (
.A1(\mem[8][3] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[9][3] ),
.Y(_135_)
);
sky130_fd_sc_hd__nand2_1 _229_ (
.A(\mem[10][3] ),
.B(_060_),
.Y(_136_)
);
sky130_fd_sc_hd__nand2_1 _230_ (
.A(\mem[11][3] ),
.B(_049_),
.Y(_137_)
);
sky130_fd_sc_hd__a21oi_1 _231_ (
.A1(\mem[7][3] ),
.A2(_049_),
.B1(\rptr_q[3] ),
.Y(_138_)
);
sky130_fd_sc_hd__a222oi_1 _232_ (
.A1(\mem[6][3] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[4][3] ),
.C1(_064_),
.C2(\mem[5][3] ),
.Y(_139_)
);
sky130_fd_sc_hd__nand2_1 _233_ (
.A(_138_),
.B(_139_),
.Y(_140_)
);
sky130_fd_sc_hd__nor3_1 _234_ (
.A(_041_),
.B(_045_),
.C(_047_),
.Y(empty)
);
sky130_fd_sc_hd__nand4_1 _235_ (
.A(\rptr_q[3] ),
.B(_132_),
.C(_133_),
.D(_134_),
.Y(_141_)
);
sky130_fd_sc_hd__a21boi_0 _236_ (
.A1(_140_),
.A2(_141_),
.B1_N(\rptr_q[2] ),
.Y(_142_)
);
sky130_fd_sc_hd__a21oi_1 _237_ (
.A1(\mem[2][3] ),
.A2(_060_),
.B1(\rptr_q[3] ),
.Y(_143_)
);
sky130_fd_sc_hd__a222oi_1 _238_ (
.A1(\mem[3][3] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[0][3] ),
.C1(_064_),
.C2(\mem[1][3] ),
.Y(_144_)
);
sky130_fd_sc_hd__nand2_1 _239_ (
.A(_143_),
.B(_144_),
.Y(_145_)
);
sky130_fd_sc_hd__nand4_1 _240_ (
.A(\rptr_q[3] ),
.B(_135_),
.C(_136_),
.D(_137_),
.Y(_146_)
);
sky130_fd_sc_hd__a21oi_1 _241_ (
.A1(_145_),
.A2(_146_),
.B1(\rptr_q[2] ),
.Y(_147_)
);
sky130_fd_sc_hd__nand2_1 _242_ (
.A(read_data[3]),
.B(_048_),
.Y(_148_)
);
sky130_fd_sc_hd__o31ai_1 _243_ (
.A1(_048_),
.A2(_142_),
.A3(_147_),
.B1(_148_),
.Y(_019_)
);
sky130_fd_sc_hd__nor2_1 _244_ (
.A(read_data[4]),
.B(take_r),
.Y(_149_)
);
sky130_fd_sc_hd__o31ai_1 _245_ (
.A1(_041_),
.A2(_045_),
.A3(_047_),
.B1(read_en),
.Y(_048_)
);
sky130_fd_sc_hd__a21oi_1 _246_ (
.A1(\mem[10][4] ),
.A2(_060_),
.B1(\rptr_q[2] ),
.Y(_150_)
);
sky130_fd_sc_hd__a222oi_1 _247_ (
.A1(\mem[11][4] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[8][4] ),
.C1(_064_),
.C2(\mem[9][4] ),
.Y(_151_)
);
sky130_fd_sc_hd__a21boi_0 _248_ (
.A1(\mem[13][4] ),
.A2(_064_),
.B1_N(\rptr_q[2] ),
.Y(_152_)
);
sky130_fd_sc_hd__a222oi_1 _249_ (
.A1(\mem[15][4] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[12][4] ),
.C1(_060_),
.C2(\mem[14][4] ),
.Y(_153_)
);
sky130_fd_sc_hd__a21oi_1 _250_ (
.A1(\mem[2][4] ),
.A2(_060_),
.B1(\rptr_q[2] ),
.Y(_154_)
);
sky130_fd_sc_hd__a222oi_1 _251_ (
.A1(\mem[3][4] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[0][4] ),
.C1(_064_),
.C2(\mem[1][4] ),
.Y(_155_)
);
sky130_fd_sc_hd__nand2_1 _252_ (
.A(\mem[7][4] ),
.B(_049_),
.Y(_156_)
);
sky130_fd_sc_hd__a222oi_1 _253_ (
.A1(\mem[6][4] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[4][4] ),
.C1(_064_),
.C2(\mem[5][4] ),
.Y(_157_)
);
sky130_fd_sc_hd__and3_1 _254_ (
.A(\rptr_q[2] ),
.B(_156_),
.C(_157_),
.X(_158_)
);
sky130_fd_sc_hd__a21oi_1 _255_ (
.A1(_150_),
.A2(_151_),
.B1(_036_),
.Y(_159_)
);
sky130_fd_sc_hd__clkinv_1 _256_ (
.A(_048_),
.Y(take_r)
);
sky130_fd_sc_hd__a21bo_1 _257_ (
.A1(_152_),
.A2(_153_),
.B1_N(_159_),
.X(_160_)
);
sky130_fd_sc_hd__a211o_1 _258_ (
.A1(_154_),
.A2(_155_),
.B1(_158_),
.C1(\rptr_q[3] ),
.X(_161_)
);
sky130_fd_sc_hd__a31oi_1 _259_ (
.A1(take_r),
.A2(_160_),
.A3(_161_),
.B1(_149_),
.Y(_018_)
);
sky130_fd_sc_hd__a21oi_1 _260_ (
.A1(\mem[4][5] ),
.A2(_062_),
.B1(\rptr_q[3] ),
.Y(_162_)
);
sky130_fd_sc_hd__a222oi_1 _261_ (
.A1(\mem[7][5] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[6][5] ),
.C1(_064_),
.C2(\mem[5][5] ),
.Y(_163_)
);
sky130_fd_sc_hd__nand2_1 _262_ (
.A(_162_),
.B(_163_),
.Y(_164_)
);
sky130_fd_sc_hd__nand2_1 _263_ (
.A(\mem[15][5] ),
.B(_049_),
.Y(_165_)
);
sky130_fd_sc_hd__a222oi_1 _264_ (
.A1(\mem[14][5] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[12][5] ),
.C1(_064_),
.C2(\mem[13][5] ),
.Y(_166_)
);
sky130_fd_sc_hd__nand3_1 _265_ (
.A(\rptr_q[3] ),
.B(_165_),
.C(_166_),
.Y(_167_)
);
sky130_fd_sc_hd__a21boi_0 _266_ (
.A1(_164_),
.A2(_167_),
.B1_N(\rptr_q[2] ),
.Y(_168_)
);
sky130_fd_sc_hd__and2_0 _267_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.X(_049_)
);
sky130_fd_sc_hd__nand2_1 _268_ (
.A(\mem[11][5] ),
.B(_049_),
.Y(_169_)
);
sky130_fd_sc_hd__a222oi_1 _269_ (
.A1(\mem[10][5] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[8][5] ),
.C1(_064_),
.C2(\mem[9][5] ),
.Y(_170_)
);
sky130_fd_sc_hd__nand3_1 _270_ (
.A(\rptr_q[3] ),
.B(_169_),
.C(_170_),
.Y(_171_)
);
sky130_fd_sc_hd__a21oi_1 _271_ (
.A1(\mem[1][5] ),
.A2(_064_),
.B1(\rptr_q[3] ),
.Y(_172_)
);
sky130_fd_sc_hd__a222oi_1 _272_ (
.A1(\mem[3][5] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[2][5] ),
.C1(_062_),
.C2(\mem[0][5] ),
.Y(_173_)
);
sky130_fd_sc_hd__nand2_1 _273_ (
.A(_172_),
.B(_173_),
.Y(_174_)
);
sky130_fd_sc_hd__a21oi_1 _274_ (
.A1(_171_),
.A2(_174_),
.B1(\rptr_q[2] ),
.Y(_175_)
);
sky130_fd_sc_hd__nand2_1 _275_ (
.A(read_data[5]),
.B(_048_),
.Y(_176_)
);
sky130_fd_sc_hd__o31ai_1 _276_ (
.A1(_048_),
.A2(_168_),
.A3(_175_),
.B1(_176_),
.Y(_017_)
);
sky130_fd_sc_hd__a22o_1 _277_ (
.A1(\mem[15][6] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[14][6] ),
.X(_177_)
);
sky130_fd_sc_hd__nand2_1 _278_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.Y(_050_)
);
sky130_fd_sc_hd__a22o_1 _279_ (
.A1(\mem[12][6] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[13][6] ),
.X(_178_)
);
sky130_fd_sc_hd__mux4_2 _280_ (
.A0(\mem[4][6] ),
.A1(\mem[5][6] ),
.A2(\mem[6][6] ),
.A3(\mem[7][6] ),
.S0(\rptr_q[0] ),
.S1(\rptr_q[1] ),
.X(_179_)
);
sky130_fd_sc_hd__a22oi_1 _281_ (
.A1(\mem[11][6] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[10][6] ),
.Y(_180_)
);
sky130_fd_sc_hd__a22oi_1 _282_ (
.A1(\mem[8][6] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[9][6] ),
.Y(_181_)
);
sky130_fd_sc_hd__mux4_2 _283_ (
.A0(\mem[0][6] ),
.A1(\mem[1][6] ),
.A2(\mem[2][6] ),
.A3(\mem[3][6] ),
.S0(\rptr_q[0] ),
.S1(\rptr_q[1] ),
.X(_182_)
);
sky130_fd_sc_hd__nor2b_1 _284_ (
.A(\rptr_q[2] ),
.B_N(_182_),
.Y(_183_)
);
sky130_fd_sc_hd__a211oi_1 _285_ (
.A1(\rptr_q[2] ),
.A2(_179_),
.B1(_183_),
.C1(\rptr_q[3] ),
.Y(_184_)
);
sky130_fd_sc_hd__o21ai_0 _286_ (
.A1(_177_),
.A2(_178_),
.B1(\rptr_q[2] ),
.Y(_185_)
);
sky130_fd_sc_hd__a21o_1 _287_ (
.A1(_180_),
.A2(_181_),
.B1(\rptr_q[2] ),
.X(_186_)
);
sky130_fd_sc_hd__a311oi_1 _288_ (
.A1(\rptr_q[3] ),
.A2(_185_),
.A3(_186_),
.B1(_048_),
.C1(_184_),
.Y(_187_)
);
sky130_fd_sc_hd__nor2_1 _289_ (
.A(_048_),
.B(_050_),
.Y(_051_)
);
sky130_fd_sc_hd__a21o_1 _290_ (
.A1(read_data[6]),
.A2(_048_),
.B1(_187_),
.X(_016_)
);
sky130_fd_sc_hd__clkinv_1 _291_ (
.A(\rptr_q[3] ),
.Y(_036_)
);
sky130_fd_sc_hd__nand4_1 _292_ (
.A(\rptr_q[3] ),
.B(\rptr_q[2] ),
.C(take_r),
.D(_049_),
.Y(_052_)
);
sky130_fd_sc_hd__xnor2_1 _293_ (
.A(\rptr_q[4] ),
.B(_052_),
.Y(_033_)
);
sky130_fd_sc_hd__nor3_1 _294_ (
.A(_041_),
.B(_045_),
.C(_046_),
.Y(full)
);
sky130_fd_sc_hd__o31a_1 _295_ (
.A1(_041_),
.A2(_045_),
.A3(_046_),
.B1(write_en),
.X(_053_)
);
sky130_fd_sc_hd__nand3_1 _296_ (
.A(\wptr_q[0] ),
.B(\wptr_q[1] ),
.C(_053_),
.Y(_054_)
);
sky130_fd_sc_hd__nand2_1 _297_ (
.A(\wptr_q[2] ),
.B(\wptr_q[3] ),
.Y(_055_)
);
sky130_fd_sc_hd__clkinv_1 _298_ (
.A(_055_),
.Y(_056_)
);
sky130_fd_sc_hd__nand4_1 _299_ (
.A(\wptr_q[0] ),
.B(\wptr_q[2] ),
.C(\wptr_q[1] ),
.D(_053_),
.Y(_057_)
);
sky130_fd_sc_hd__and4_1 _300_ (
.A(\wptr_q[0] ),
.B(\wptr_q[1] ),
.C(_053_),
.D(_056_),
.X(_015_)
);
sky130_fd_sc_hd__xor2_1 _301_ (
.A(\wptr_q[4] ),
.B(_015_),
.X(_032_)
);
sky130_fd_sc_hd__clkinv_1 _302_ (
.A(\wptr_q[1] ),
.Y(_037_)
);
sky130_fd_sc_hd__nand3_1 _303_ (
.A(_034_),
.B(_037_),
.C(_053_),
.Y(_058_)
);
sky130_fd_sc_hd__nor2_1 _304_ (
.A(_055_),
.B(_058_),
.Y(_012_)
);
sky130_fd_sc_hd__nand2_1 _305_ (
.A(read_data[7]),
.B(_048_),
.Y(_059_)
);
sky130_fd_sc_hd__lpflow_isobufsrc_1 _306_ (
.A(\rptr_q[1] ),
.SLEEP(\rptr_q[0] ),
.X(_060_)
);
sky130_fd_sc_hd__nand2b_1 _307_ (
.A_N(\rptr_q[0] ),
.B(\rptr_q[1] ),
.Y(_061_)
);
sky130_fd_sc_hd__nor2_1 _308_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.Y(_062_)
);
sky130_fd_sc_hd__nor3_1 _309_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.C(\mem[12][7] ),
.Y(_063_)
);
sky130_fd_sc_hd__lpflow_isobufsrc_1 _310_ (
.A(\rptr_q[0] ),
.SLEEP(\rptr_q[1] ),
.X(_064_)
);
sky130_fd_sc_hd__nand2b_1 _311_ (
.A_N(\rptr_q[1] ),
.B(\rptr_q[0] ),
.Y(_065_)
);
sky130_fd_sc_hd__o22ai_1 _312_ (
.A1(\mem[14][7] ),
.A2(_061_),
.B1(_065_),
.B2(\mem[13][7] ),
.Y(_066_)
);
sky130_fd_sc_hd__nand2b_1 _313_ (
.A_N(\wptr_q[1] ),
.B(\rptr_q[1] ),
.Y(_038_)
);
sky130_fd_sc_hd__o21ai_0 _314_ (
.A1(\mem[15][7] ),
.A2(_050_),
.B1(\rptr_q[3] ),
.Y(_067_)
);
sky130_fd_sc_hd__nor3_1 _315_ (
.A(_063_),
.B(_066_),
.C(_067_),
.Y(_068_)
);
sky130_fd_sc_hd__nor3_1 _316_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.C(\mem[4][7] ),
.Y(_069_)
);
sky130_fd_sc_hd__o22ai_1 _317_ (
.A1(\mem[6][7] ),
.A2(_061_),
.B1(_065_),
.B2(\mem[5][7] ),
.Y(_070_)
);
sky130_fd_sc_hd__nor2_1 _318_ (
.A(\mem[7][7] ),
.B(_050_),
.Y(_071_)
);
sky130_fd_sc_hd__or3_1 _319_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.C(\mem[8][7] ),
.X(_072_)
);
sky130_fd_sc_hd__o221ai_1 _320_ (
.A1(\mem[11][7] ),
.A2(_050_),
.B1(_065_),
.B2(\mem[9][7] ),
.C1(_072_),
.Y(_073_)
);
sky130_fd_sc_hd__o21ai_0 _321_ (
.A1(\mem[10][7] ),
.A2(_061_),
.B1(\rptr_q[3] ),
.Y(_074_)
);
sky130_fd_sc_hd__or3_1 _322_ (
.A(\rptr_q[0] ),
.B(\rptr_q[1] ),
.C(\mem[0][7] ),
.X(_075_)
);
sky130_fd_sc_hd__o221ai_1 _323_ (
.A1(\mem[2][7] ),
.A2(_061_),
.B1(_065_),
.B2(\mem[1][7] ),
.C1(_075_),
.Y(_076_)
);
sky130_fd_sc_hd__nand2b_1 _324_ (
.A_N(\wptr_q[2] ),
.B(\rptr_q[2] ),
.Y(_039_)
);
sky130_fd_sc_hd__o21ai_0 _325_ (
.A1(\mem[3][7] ),
.A2(_050_),
.B1(_036_),
.Y(_077_)
);
sky130_fd_sc_hd__o22ai_1 _326_ (
.A1(_073_),
.A2(_074_),
.B1(_076_),
.B2(_077_),
.Y(_078_)
);
sky130_fd_sc_hd__o41ai_1 _327_ (
.A1(\rptr_q[3] ),
.A2(_069_),
.A3(_070_),
.A4(_071_),
.B1(\rptr_q[2] ),
.Y(_079_)
);
sky130_fd_sc_hd__o22ai_1 _328_ (
.A1(\rptr_q[2] ),
.A2(_078_),
.B1(_079_),
.B2(_068_),
.Y(_080_)
);
sky130_fd_sc_hd__o21ai_0 _329_ (
.A1(_048_),
.A2(_080_),
.B1(_059_),
.Y(_031_)
);
sky130_fd_sc_hd__nand3_1 _330_ (
.A(\wptr_q[0] ),
.B(_037_),
.C(_053_),
.Y(_081_)
);
sky130_fd_sc_hd__nor3_1 _331_ (
.A(\wptr_q[2] ),
.B(\wptr_q[3] ),
.C(_081_),
.Y(_001_)
);
sky130_fd_sc_hd__nor3_1 _332_ (
.A(\wptr_q[2] ),
.B(\wptr_q[3] ),
.C(_054_),
.Y(_003_)
);
sky130_fd_sc_hd__nand2b_1 _333_ (
.A_N(\wptr_q[3] ),
.B(\wptr_q[2] ),
.Y(_082_)
);
sky130_fd_sc_hd__nor2_1 _334_ (
.A(_081_),
.B(_082_),
.Y(_005_)
);
sky130_fd_sc_hd__nand2b_1 _335_ (
.A_N(\wptr_q[3] ),
.B(\rptr_q[3] ),
.Y(_040_)
);
sky130_fd_sc_hd__nor2_1 _336_ (
.A(\wptr_q[3] ),
.B(_057_),
.Y(_007_)
);
sky130_fd_sc_hd__nand2b_1 _337_ (
.A_N(\wptr_q[2] ),
.B(\wptr_q[3] ),
.Y(_083_)
);
sky130_fd_sc_hd__nor2_1 _338_ (
.A(_081_),
.B(_083_),
.Y(_009_)
);
sky130_fd_sc_hd__nor2_1 _339_ (
.A(_054_),
.B(_083_),
.Y(_011_)
);
sky130_fd_sc_hd__nor2_1 _340_ (
.A(_055_),
.B(_081_),
.Y(_013_)
);
sky130_fd_sc_hd__nor2_1 _341_ (
.A(_058_),
.B(_083_),
.Y(_008_)
);
sky130_fd_sc_hd__nand3_1 _342_ (
.A(_034_),
.B(\wptr_q[1] ),
.C(_053_),
.Y(_084_)
);
sky130_fd_sc_hd__nor2_1 _343_ (
.A(_055_),
.B(_084_),
.Y(_014_)
);
sky130_fd_sc_hd__nor3_1 _344_ (
.A(\wptr_q[2] ),
.B(\wptr_q[3] ),
.C(_084_),
.Y(_002_)
);
sky130_fd_sc_hd__nor3_1 _345_ (
.A(\wptr_q[2] ),
.B(\wptr_q[3] ),
.C(_058_),
.Y(_000_)
);
sky130_fd_sc_hd__o2111ai_1 _346_ (
.A1(\wptr_q[0] ),
.A2(_035_),
.B1(_038_),
.C1(_039_),
.D1(_040_),
.Y(_041_)
);
sky130_fd_sc_hd__nor2_1 _347_ (
.A(_058_),
.B(_082_),
.Y(_004_)
);
sky130_fd_sc_hd__nor2_1 _348_ (
.A(_083_),
.B(_084_),
.Y(_010_)
);
sky130_fd_sc_hd__nor2_1 _349_ (
.A(_082_),
.B(_084_),
.Y(_006_)
);
sky130_fd_sc_hd__xnor2_1 _350_ (
.A(_035_),
.B(take_r),
.Y(_030_)
);
sky130_fd_sc_hd__o21ai_0 _351_ (
.A1(_035_),
.A2(_048_),
.B1(\rptr_q[1] ),
.Y(_085_)
);
sky130_fd_sc_hd__o21ai_0 _352_ (
.A1(_048_),
.A2(_065_),
.B1(_085_),
.Y(_029_)
);
sky130_fd_sc_hd__xor2_1 _353_ (
.A(\rptr_q[2] ),
.B(_051_),
.X(_028_)
);
sky130_fd_sc_hd__a31oi_1 _354_ (
.A1(\rptr_q[2] ),
.A2(take_r),
.A3(_049_),
.B1(\rptr_q[3] ),
.Y(_086_)
);
sky130_fd_sc_hd__lpflow_isobufsrc_1 _355_ (
.A(_052_),
.SLEEP(_086_),
.X(_027_)
);
sky130_fd_sc_hd__xnor2_1 _356_ (
.A(_034_),
.B(_053_),
.Y(_026_)
);
sky130_fd_sc_hd__nand2b_1 _357_ (
.A_N(\rptr_q[2] ),
.B(\wptr_q[2] ),
.Y(_042_)
);
sky130_fd_sc_hd__o211ai_1 _358_ (
.A1(_037_),
.A2(_053_),
.B1(_081_),
.C1(_084_),
.Y(_025_)
);
sky130_fd_sc_hd__xnor2_1 _359_ (
.A(\wptr_q[2] ),
.B(_054_),
.Y(_024_)
);
sky130_fd_sc_hd__xnor2_1 _360_ (
.A(\wptr_q[3] ),
.B(_057_),
.Y(_023_)
);
sky130_fd_sc_hd__nand2_1 _361_ (
.A(read_data[0]),
.B(_048_),
.Y(_087_)
);
sky130_fd_sc_hd__a22oi_1 _362_ (
.A1(\mem[6][0] ),
.A2(_060_),
.B1(_062_),
.B2(\mem[4][0] ),
.Y(_088_)
);
sky130_fd_sc_hd__a22oi_1 _363_ (
.A1(\mem[7][0] ),
.A2(_049_),
.B1(_064_),
.B2(\mem[5][0] ),
.Y(_089_)
);
sky130_fd_sc_hd__nand2_1 _364_ (
.A(_088_),
.B(_089_),
.Y(_090_)
);
sky130_fd_sc_hd__a22oi_1 _365_ (
.A1(\mem[14][0] ),
.A2(_060_),
.B1(_064_),
.B2(\mem[13][0] ),
.Y(_091_)
);
sky130_fd_sc_hd__a22oi_1 _366_ (
.A1(\mem[15][0] ),
.A2(_049_),
.B1(_062_),
.B2(\mem[12][0] ),
.Y(_092_)
);
sky130_fd_sc_hd__nand2_1 _367_ (
.A(_091_),
.B(_092_),
.Y(_093_)
);
sky130_fd_sc_hd__nand2b_1 _368_ (
.A_N(\rptr_q[0] ),
.B(\wptr_q[0] ),
.Y(_043_)
);
sky130_fd_sc_hd__a22oi_1 _369_ (
.A1(\mem[3][0] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[2][0] ),
.Y(_094_)
);
sky130_fd_sc_hd__a22oi_1 _370_ (
.A1(\mem[0][0] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[1][0] ),
.Y(_095_)
);
sky130_fd_sc_hd__a22oi_1 _371_ (
.A1(\mem[11][0] ),
.A2(_049_),
.B1(_060_),
.B2(\mem[10][0] ),
.Y(_096_)
);
sky130_fd_sc_hd__a22oi_1 _372_ (
.A1(\mem[8][0] ),
.A2(_062_),
.B1(_064_),
.B2(\mem[9][0] ),
.Y(_097_)
);
sky130_fd_sc_hd__a21oi_1 _373_ (
.A1(_096_),
.A2(_097_),
.B1(\rptr_q[2] ),
.Y(_098_)
);
sky130_fd_sc_hd__a211oi_1 _374_ (
.A1(\rptr_q[2] ),
.A2(_093_),
.B1(_098_),
.C1(_036_),
.Y(_099_)
);
sky130_fd_sc_hd__a21oi_1 _375_ (
.A1(_094_),
.A2(_095_),
.B1(\rptr_q[2] ),
.Y(_100_)
);
sky130_fd_sc_hd__a211oi_1 _376_ (
.A1(\rptr_q[2] ),
.A2(_090_),
.B1(_100_),
.C1(\rptr_q[3] ),
.Y(_101_)
);
sky130_fd_sc_hd__o31ai_1 _377_ (
.A1(_048_),
.A2(_099_),
.A3(_101_),
.B1(_087_),
.Y(_022_)
);
sky130_fd_sc_hd__nand2_1 _378_ (
.A(\mem[12][1] ),
.B(_062_),
.Y(_102_)
);
sky130_fd_sc_hd__dfrtp_1 _379_ (
.CLK(clk),
.D(_030_),
.Q(\rptr_q[0] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _380_ (
.CLK(clk),
.D(_029_),
.Q(\rptr_q[1] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _381_ (
.CLK(clk),
.D(_028_),
.Q(\rptr_q[2] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _382_ (
.CLK(clk),
.D(_027_),
.Q(\rptr_q[3] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _383_ (
.CLK(clk),
.D(_033_),
.Q(\rptr_q[4] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _384_ (
.CLK(clk),
.D(_026_),
.Q(\wptr_q[0] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _385_ (
.CLK(clk),
.D(_025_),
.Q(\wptr_q[1] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _386_ (
.CLK(clk),
.D(_024_),
.Q(\wptr_q[2] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _387_ (
.CLK(clk),
.D(_023_),
.Q(\wptr_q[3] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _388_ (
.CLK(clk),
.D(_032_),
.Q(\wptr_q[4] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _389_ (
.CLK(clk),
.D(_022_),
.Q(read_data[0]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _390_ (
.CLK(clk),
.D(_021_),
.Q(read_data[1]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _391_ (
.CLK(clk),
.D(_020_),
.Q(read_data[2]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _392_ (
.CLK(clk),
.D(_019_),
.Q(read_data[3]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _393_ (
.CLK(clk),
.D(_018_),
.Q(read_data[4]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _394_ (
.CLK(clk),
.D(_017_),
.Q(read_data[5]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _395_ (
.CLK(clk),
.D(_016_),
.Q(read_data[6]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _396_ (
.CLK(clk),
.D(_031_),
.Q(read_data[7]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _397_ (
.CLK(clk),
.D(take_r),
.Q(read_valid),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__edfxtp_1 _398_ (
.CLK(clk),
.D(write_data[0]),
.DE(_000_),
.Q(\mem[0][0] )
);
sky130_fd_sc_hd__edfxtp_1 _399_ (
.CLK(clk),
.D(write_data[1]),
.DE(_000_),
.Q(\mem[0][1] )
);
sky130_fd_sc_hd__edfxtp_1 _400_ (
.CLK(clk),
.D(write_data[2]),
.DE(_000_),
.Q(\mem[0][2] )
);
sky130_fd_sc_hd__edfxtp_1 _401_ (
.CLK(clk),
.D(write_data[3]),
.DE(_000_),
.Q(\mem[0][3] )
);
sky130_fd_sc_hd__edfxtp_1 _402_ (
.CLK(clk),
.D(write_data[4]),
.DE(_000_),
.Q(\mem[0][4] )
);
sky130_fd_sc_hd__edfxtp_1 _403_ (
.CLK(clk),
.D(write_data[5]),
.DE(_000_),
.Q(\mem[0][5] )
);
sky130_fd_sc_hd__edfxtp_1 _404_ (
.CLK(clk),
.D(write_data[6]),
.DE(_000_),
.Q(\mem[0][6] )
);
sky130_fd_sc_hd__edfxtp_1 _405_ (
.CLK(clk),
.D(write_data[7]),
.DE(_000_),
.Q(\mem[0][7] )
);
sky130_fd_sc_hd__edfxtp_1 _406_ (
.CLK(clk),
.D(write_data[0]),
.DE(_001_),
.Q(\mem[1][0] )
);
sky130_fd_sc_hd__edfxtp_1 _407_ (
.CLK(clk),
.D(write_data[1]),
.DE(_001_),
.Q(\mem[1][1] )
);
sky130_fd_sc_hd__edfxtp_1 _408_ (
.CLK(clk),
.D(write_data[2]),
.DE(_001_),
.Q(\mem[1][2] )
);
sky130_fd_sc_hd__edfxtp_1 _409_ (
.CLK(clk),
.D(write_data[3]),
.DE(_001_),
.Q(\mem[1][3] )
);
sky130_fd_sc_hd__edfxtp_1 _410_ (
.CLK(clk),
.D(write_data[4]),
.DE(_001_),
.Q(\mem[1][4] )
);
sky130_fd_sc_hd__edfxtp_1 _411_ (
.CLK(clk),
.D(write_data[5]),
.DE(_001_),
.Q(\mem[1][5] )
);
sky130_fd_sc_hd__edfxtp_1 _412_ (
.CLK(clk),
.D(write_data[6]),
.DE(_001_),
.Q(\mem[1][6] )
);
sky130_fd_sc_hd__edfxtp_1 _413_ (
.CLK(clk),
.D(write_data[7]),
.DE(_001_),
.Q(\mem[1][7] )
);
sky130_fd_sc_hd__edfxtp_1 _414_ (
.CLK(clk),
.D(write_data[0]),
.DE(_002_),
.Q(\mem[2][0] )
);
sky130_fd_sc_hd__edfxtp_1 _415_ (
.CLK(clk),
.D(write_data[1]),
.DE(_002_),
.Q(\mem[2][1] )
);
sky130_fd_sc_hd__edfxtp_1 _416_ (
.CLK(clk),
.D(write_data[2]),
.DE(_002_),
.Q(\mem[2][2] )
);
sky130_fd_sc_hd__edfxtp_1 _417_ (
.CLK(clk),
.D(write_data[3]),
.DE(_002_),
.Q(\mem[2][3] )
);
sky130_fd_sc_hd__edfxtp_1 _418_ (
.CLK(clk),
.D(write_data[4]),
.DE(_002_),
.Q(\mem[2][4] )
);
sky130_fd_sc_hd__edfxtp_1 _419_ (
.CLK(clk),
.D(write_data[5]),
.DE(_002_),
.Q(\mem[2][5] )
);
sky130_fd_sc_hd__edfxtp_1 _420_ (
.CLK(clk),
.D(write_data[6]),
.DE(_002_),
.Q(\mem[2][6] )
);
sky130_fd_sc_hd__edfxtp_1 _421_ (
.CLK(clk),
.D(write_data[7]),
.DE(_002_),
.Q(\mem[2][7] )
);
sky130_fd_sc_hd__edfxtp_1 _422_ (
.CLK(clk),
.D(write_data[0]),
.DE(_003_),
.Q(\mem[3][0] )
);
sky130_fd_sc_hd__edfxtp_1 _423_ (
.CLK(clk),
.D(write_data[1]),
.DE(_003_),
.Q(\mem[3][1] )
);
sky130_fd_sc_hd__edfxtp_1 _424_ (
.CLK(clk),
.D(write_data[2]),
.DE(_003_),
.Q(\mem[3][2] )
);
sky130_fd_sc_hd__edfxtp_1 _425_ (
.CLK(clk),
.D(write_data[3]),
.DE(_003_),
.Q(\mem[3][3] )
);
sky130_fd_sc_hd__edfxtp_1 _426_ (
.CLK(clk),
.D(write_data[4]),
.DE(_003_),
.Q(\mem[3][4] )
);
sky130_fd_sc_hd__edfxtp_1 _427_ (
.CLK(clk),
.D(write_data[5]),
.DE(_003_),
.Q(\mem[3][5] )
);
sky130_fd_sc_hd__edfxtp_1 _428_ (
.CLK(clk),
.D(write_data[6]),
.DE(_003_),
.Q(\mem[3][6] )
);
sky130_fd_sc_hd__edfxtp_1 _429_ (
.CLK(clk),
.D(write_data[7]),
.DE(_003_),
.Q(\mem[3][7] )
);
sky130_fd_sc_hd__edfxtp_1 _430_ (
.CLK(clk),
.D(write_data[0]),
.DE(_004_),
.Q(\mem[4][0] )
);
sky130_fd_sc_hd__edfxtp_1 _431_ (
.CLK(clk),
.D(write_data[1]),
.DE(_004_),
.Q(\mem[4][1] )
);
sky130_fd_sc_hd__edfxtp_1 _432_ (
.CLK(clk),
.D(write_data[2]),
.DE(_004_),
.Q(\mem[4][2] )
);
sky130_fd_sc_hd__edfxtp_1 _433_ (
.CLK(clk),
.D(write_data[3]),
.DE(_004_),
.Q(\mem[4][3] )
);
sky130_fd_sc_hd__edfxtp_1 _434_ (
.CLK(clk),
.D(write_data[4]),
.DE(_004_),
.Q(\mem[4][4] )
);
sky130_fd_sc_hd__edfxtp_1 _435_ (
.CLK(clk),
.D(write_data[5]),
.DE(_004_),
.Q(\mem[4][5] )
);
sky130_fd_sc_hd__edfxtp_1 _436_ (
.CLK(clk),
.D(write_data[6]),
.DE(_004_),
.Q(\mem[4][6] )
);
sky130_fd_sc_hd__edfxtp_1 _437_ (
.CLK(clk),
.D(write_data[7]),
.DE(_004_),
.Q(\mem[4][7] )
);
sky130_fd_sc_hd__edfxtp_1 _438_ (
.CLK(clk),
.D(write_data[0]),
.DE(_005_),
.Q(\mem[5][0] )
);
sky130_fd_sc_hd__edfxtp_1 _439_ (
.CLK(clk),
.D(write_data[1]),
.DE(_005_),
.Q(\mem[5][1] )
);
sky130_fd_sc_hd__edfxtp_1 _440_ (
.CLK(clk),
.D(write_data[2]),
.DE(_005_),
.Q(\mem[5][2] )
);
sky130_fd_sc_hd__edfxtp_1 _441_ (
.CLK(clk),
.D(write_data[3]),
.DE(_005_),
.Q(\mem[5][3] )
);
sky130_fd_sc_hd__edfxtp_1 _442_ (
.CLK(clk),
.D(write_data[4]),
.DE(_005_),
.Q(\mem[5][4] )
);
sky130_fd_sc_hd__edfxtp_1 _443_ (
.CLK(clk),
.D(write_data[5]),
.DE(_005_),
.Q(\mem[5][5] )
);
sky130_fd_sc_hd__edfxtp_1 _444_ (
.CLK(clk),
.D(write_data[6]),
.DE(_005_),
.Q(\mem[5][6] )
);
sky130_fd_sc_hd__edfxtp_1 _445_ (
.CLK(clk),
.D(write_data[7]),
.DE(_005_),
.Q(\mem[5][7] )
);
sky130_fd_sc_hd__edfxtp_1 _446_ (
.CLK(clk),
.D(write_data[0]),
.DE(_006_),
.Q(\mem[6][0] )
);
sky130_fd_sc_hd__edfxtp_1 _447_ (
.CLK(clk),
.D(write_data[1]),
.DE(_006_),
.Q(\mem[6][1] )
);
sky130_fd_sc_hd__edfxtp_1 _448_ (
.CLK(clk),
.D(write_data[2]),
.DE(_006_),
.Q(\mem[6][2] )
);
sky130_fd_sc_hd__edfxtp_1 _449_ (
.CLK(clk),
.D(write_data[3]),
.DE(_006_),
.Q(\mem[6][3] )
);
sky130_fd_sc_hd__edfxtp_1 _450_ (
.CLK(clk),
.D(write_data[4]),
.DE(_006_),
.Q(\mem[6][4] )
);
sky130_fd_sc_hd__edfxtp_1 _451_ (
.CLK(clk),
.D(write_data[5]),
.DE(_006_),
.Q(\mem[6][5] )
);
sky130_fd_sc_hd__edfxtp_1 _452_ (
.CLK(clk),
.D(write_data[6]),
.DE(_006_),
.Q(\mem[6][6] )
);
sky130_fd_sc_hd__edfxtp_1 _453_ (
.CLK(clk),
.D(write_data[7]),
.DE(_006_),
.Q(\mem[6][7] )
);
sky130_fd_sc_hd__edfxtp_1 _454_ (
.CLK(clk),
.D(write_data[0]),
.DE(_007_),
.Q(\mem[7][0] )
);
sky130_fd_sc_hd__edfxtp_1 _455_ (
.CLK(clk),
.D(write_data[1]),
.DE(_007_),
.Q(\mem[7][1] )
);
sky130_fd_sc_hd__edfxtp_1 _456_ (
.CLK(clk),
.D(write_data[2]),
.DE(_007_),
.Q(\mem[7][2] )
);
sky130_fd_sc_hd__edfxtp_1 _457_ (
.CLK(clk),
.D(write_data[3]),
.DE(_007_),
.Q(\mem[7][3] )
);
sky130_fd_sc_hd__edfxtp_1 _458_ (
.CLK(clk),
.D(write_data[4]),
.DE(_007_),
.Q(\mem[7][4] )
);
sky130_fd_sc_hd__edfxtp_1 _459_ (
.CLK(clk),
.D(write_data[5]),
.DE(_007_),
.Q(\mem[7][5] )
);
sky130_fd_sc_hd__edfxtp_1 _460_ (
.CLK(clk),
.D(write_data[6]),
.DE(_007_),
.Q(\mem[7][6] )
);
sky130_fd_sc_hd__edfxtp_1 _461_ (
.CLK(clk),
.D(write_data[7]),
.DE(_007_),
.Q(\mem[7][7] )
);
sky130_fd_sc_hd__edfxtp_1 _462_ (
.CLK(clk),
.D(write_data[0]),
.DE(_008_),
.Q(\mem[8][0] )
);
sky130_fd_sc_hd__edfxtp_1 _463_ (
.CLK(clk),
.D(write_data[1]),
.DE(_008_),
.Q(\mem[8][1] )
);
sky130_fd_sc_hd__edfxtp_1 _464_ (
.CLK(clk),
.D(write_data[2]),
.DE(_008_),
.Q(\mem[8][2] )
);
sky130_fd_sc_hd__edfxtp_1 _465_ (
.CLK(clk),
.D(write_data[3]),
.DE(_008_),
.Q(\mem[8][3] )
);
sky130_fd_sc_hd__edfxtp_1 _466_ (
.CLK(clk),
.D(write_data[4]),
.DE(_008_),
.Q(\mem[8][4] )
);
sky130_fd_sc_hd__edfxtp_1 _467_ (
.CLK(clk),
.D(write_data[5]),
.DE(_008_),
.Q(\mem[8][5] )
);
sky130_fd_sc_hd__edfxtp_1 _468_ (
.CLK(clk),
.D(write_data[6]),
.DE(_008_),
.Q(\mem[8][6] )
);
sky130_fd_sc_hd__edfxtp_1 _469_ (
.CLK(clk),
.D(write_data[7]),
.DE(_008_),
.Q(\mem[8][7] )
);
sky130_fd_sc_hd__edfxtp_1 _470_ (
.CLK(clk),
.D(write_data[0]),
.DE(_009_),
.Q(\mem[9][0] )
);
sky130_fd_sc_hd__edfxtp_1 _471_ (
.CLK(clk),
.D(write_data[1]),
.DE(_009_),
.Q(\mem[9][1] )
);
sky130_fd_sc_hd__edfxtp_1 _472_ (
.CLK(clk),
.D(write_data[2]),
.DE(_009_),
.Q(\mem[9][2] )
);
sky130_fd_sc_hd__edfxtp_1 _473_ (
.CLK(clk),
.D(write_data[3]),
.DE(_009_),
.Q(\mem[9][3] )
);
sky130_fd_sc_hd__edfxtp_1 _474_ (
.CLK(clk),
.D(write_data[4]),
.DE(_009_),
.Q(\mem[9][4] )
);
sky130_fd_sc_hd__edfxtp_1 _475_ (
.CLK(clk),
.D(write_data[5]),
.DE(_009_),
.Q(\mem[9][5] )
);
sky130_fd_sc_hd__edfxtp_1 _476_ (
.CLK(clk),
.D(write_data[6]),
.DE(_009_),
.Q(\mem[9][6] )
);
sky130_fd_sc_hd__edfxtp_1 _477_ (
.CLK(clk),
.D(write_data[7]),
.DE(_009_),
.Q(\mem[9][7] )
);
sky130_fd_sc_hd__edfxtp_1 _478_ (
.CLK(clk),
.D(write_data[0]),
.DE(_010_),
.Q(\mem[10][0] )
);
sky130_fd_sc_hd__edfxtp_1 _479_ (
.CLK(clk),
.D(write_data[1]),
.DE(_010_),
.Q(\mem[10][1] )
);
sky130_fd_sc_hd__edfxtp_1 _480_ (
.CLK(clk),
.D(write_data[2]),
.DE(_010_),
.Q(\mem[10][2] )
);
sky130_fd_sc_hd__edfxtp_1 _481_ (
.CLK(clk),
.D(write_data[3]),
.DE(_010_),
.Q(\mem[10][3] )
);
sky130_fd_sc_hd__edfxtp_1 _482_ (
.CLK(clk),
.D(write_data[4]),
.DE(_010_),
.Q(\mem[10][4] )
);
sky130_fd_sc_hd__edfxtp_1 _483_ (
.CLK(clk),
.D(write_data[5]),
.DE(_010_),
.Q(\mem[10][5] )
);
sky130_fd_sc_hd__edfxtp_1 _484_ (
.CLK(clk),
.D(write_data[6]),
.DE(_010_),
.Q(\mem[10][6] )
);
sky130_fd_sc_hd__edfxtp_1 _485_ (
.CLK(clk),
.D(write_data[7]),
.DE(_010_),
.Q(\mem[10][7] )
);
sky130_fd_sc_hd__edfxtp_1 _486_ (
.CLK(clk),
.D(write_data[0]),
.DE(_011_),
.Q(\mem[11][0] )
);
sky130_fd_sc_hd__edfxtp_1 _487_ (
.CLK(clk),
.D(write_data[1]),
.DE(_011_),
.Q(\mem[11][1] )
);
sky130_fd_sc_hd__edfxtp_1 _488_ (
.CLK(clk),
.D(write_data[2]),
.DE(_011_),
.Q(\mem[11][2] )
);
sky130_fd_sc_hd__edfxtp_1 _489_ (
.CLK(clk),
.D(write_data[3]),
.DE(_011_),
.Q(\mem[11][3] )
);
sky130_fd_sc_hd__edfxtp_1 _490_ (
.CLK(clk),
.D(write_data[4]),
.DE(_011_),
.Q(\mem[11][4] )
);
sky130_fd_sc_hd__edfxtp_1 _491_ (
.CLK(clk),
.D(write_data[5]),
.DE(_011_),
.Q(\mem[11][5] )
);
sky130_fd_sc_hd__edfxtp_1 _492_ (
.CLK(clk),
.D(write_data[6]),
.DE(_011_),
.Q(\mem[11][6] )
);
sky130_fd_sc_hd__edfxtp_1 _493_ (
.CLK(clk),
.D(write_data[7]),
.DE(_011_),
.Q(\mem[11][7] )
);
sky130_fd_sc_hd__edfxtp_1 _494_ (
.CLK(clk),
.D(write_data[0]),
.DE(_012_),
.Q(\mem[12][0] )
);
sky130_fd_sc_hd__edfxtp_1 _495_ (
.CLK(clk),
.D(write_data[1]),
.DE(_012_),
.Q(\mem[12][1] )
);
sky130_fd_sc_hd__edfxtp_1 _496_ (
.CLK(clk),
.D(write_data[2]),
.DE(_012_),
.Q(\mem[12][2] )
);
sky130_fd_sc_hd__edfxtp_1 _497_ (
.CLK(clk),
.D(write_data[3]),
.DE(_012_),
.Q(\mem[12][3] )
);
sky130_fd_sc_hd__edfxtp_1 _498_ (
.CLK(clk),
.D(write_data[4]),
.DE(_012_),
.Q(\mem[12][4] )
);
sky130_fd_sc_hd__edfxtp_1 _499_ (
.CLK(clk),
.D(write_data[5]),
.DE(_012_),
.Q(\mem[12][5] )
);
sky130_fd_sc_hd__edfxtp_1 _500_ (
.CLK(clk),
.D(write_data[6]),
.DE(_012_),
.Q(\mem[12][6] )
);
sky130_fd_sc_hd__edfxtp_1 _501_ (
.CLK(clk),
.D(write_data[7]),
.DE(_012_),
.Q(\mem[12][7] )
);
sky130_fd_sc_hd__edfxtp_1 _502_ (
.CLK(clk),
.D(write_data[0]),
.DE(_013_),
.Q(\mem[13][0] )
);
sky130_fd_sc_hd__edfxtp_1 _503_ (
.CLK(clk),
.D(write_data[1]),
.DE(_013_),
.Q(\mem[13][1] )
);
sky130_fd_sc_hd__edfxtp_1 _504_ (
.CLK(clk),
.D(write_data[2]),
.DE(_013_),
.Q(\mem[13][2] )
);
sky130_fd_sc_hd__edfxtp_1 _505_ (
.CLK(clk),
.D(write_data[3]),
.DE(_013_),
.Q(\mem[13][3] )
);
sky130_fd_sc_hd__edfxtp_1 _506_ (
.CLK(clk),
.D(write_data[4]),
.DE(_013_),
.Q(\mem[13][4] )
);
sky130_fd_sc_hd__edfxtp_1 _507_ (
.CLK(clk),
.D(write_data[5]),
.DE(_013_),
.Q(\mem[13][5] )
);
sky130_fd_sc_hd__edfxtp_1 _508_ (
.CLK(clk),
.D(write_data[6]),
.DE(_013_),
.Q(\mem[13][6] )
);
sky130_fd_sc_hd__edfxtp_1 _509_ (
.CLK(clk),
.D(write_data[7]),
.DE(_013_),
.Q(\mem[13][7] )
);
sky130_fd_sc_hd__edfxtp_1 _510_ (
.CLK(clk),
.D(write_data[0]),
.DE(_014_),
.Q(\mem[14][0] )
);
sky130_fd_sc_hd__edfxtp_1 _511_ (
.CLK(clk),
.D(write_data[1]),
.DE(_014_),
.Q(\mem[14][1] )
);
sky130_fd_sc_hd__edfxtp_1 _512_ (
.CLK(clk),
.D(write_data[2]),
.DE(_014_),
.Q(\mem[14][2] )
);
sky130_fd_sc_hd__edfxtp_1 _513_ (
.CLK(clk),
.D(write_data[3]),
.DE(_014_),
.Q(\mem[14][3] )
);
sky130_fd_sc_hd__edfxtp_1 _514_ (
.CLK(clk),
.D(write_data[4]),
.DE(_014_),
.Q(\mem[14][4] )
);
sky130_fd_sc_hd__edfxtp_1 _515_ (
.CLK(clk),
.D(write_data[5]),
.DE(_014_),
.Q(\mem[14][5] )
);
sky130_fd_sc_hd__edfxtp_1 _516_ (
.CLK(clk),
.D(write_data[6]),
.DE(_014_),
.Q(\mem[14][6] )
);
sky130_fd_sc_hd__edfxtp_1 _517_ (
.CLK(clk),
.D(write_data[7]),
.DE(_014_),
.Q(\mem[14][7] )
);
sky130_fd_sc_hd__edfxtp_1 _518_ (
.CLK(clk),
.D(write_data[0]),
.DE(_015_),
.Q(\mem[15][0] )
);
sky130_fd_sc_hd__edfxtp_1 _519_ (
.CLK(clk),
.D(write_data[1]),
.DE(_015_),
.Q(\mem[15][1] )
);
sky130_fd_sc_hd__edfxtp_1 _520_ (
.CLK(clk),
.D(write_data[2]),
.DE(_015_),
.Q(\mem[15][2] )
);
sky130_fd_sc_hd__edfxtp_1 _521_ (
.CLK(clk),
.D(write_data[3]),
.DE(_015_),
.Q(\mem[15][3] )
);
sky130_fd_sc_hd__edfxtp_1 _522_ (
.CLK(clk),
.D(write_data[4]),
.DE(_015_),
.Q(\mem[15][4] )
);
sky130_fd_sc_hd__edfxtp_1 _523_ (
.CLK(clk),
.D(write_data[5]),
.DE(_015_),
.Q(\mem[15][5] )
);
sky130_fd_sc_hd__edfxtp_1 _524_ (
.CLK(clk),
.D(write_data[6]),
.DE(_015_),
.Q(\mem[15][6] )
);
sky130_fd_sc_hd__edfxtp_1 _525_ (
.CLK(clk),
.D(write_data[7]),
.DE(_015_),
.Q(\mem[15][7] )
);
endmodule
Check yourself
Remember
- Utilization is the whole core's fill; target density guides local fill through a penalty and needs room above average utilization.
- A higher target density shortens HPWL by clustering cells and concentrates routing demand on the clusters.
- The global router compares demand with track capacity per GCell edge; overflow is demand above capacity, and the platform keeps 20 % of tracks back.
- Read the map with per-layer edge-overflow reports; lower density, routability-driven placement, lower utilization or a new floorplan can relieve it.