R5.3.1 The buffer one stall too small

// sync_fifo: the FIFO of R5.3, a count register and pointers that wrap at DEPTH - 1, with a
// sticky overflow flag: 1 from the first edge where a write is offered while full.
module sync_fifo #(parameter int DEPTH = 16, parameter int WIDTH = 8) (
  input  logic             clk,
  input  logic             rst_n,
  input  logic             write_en,
  input  logic [WIDTH-1:0] write_data,
  input  logic             read_en,
  output logic [WIDTH-1:0] read_data,
  output logic             read_valid,
  output logic             full,
  output logic             empty,
  output logic             overflow
);
  localparam int AW = $clog2(DEPTH);      // address bits
  localparam int CW = $clog2(DEPTH + 1);  // count bits: 0 to DEPTH

  logic [WIDTH-1:0] mem [DEPTH];
  logic [AW-1:0]    wptr_q, rptr_q;
  logic [CW-1:0]    used_q;               // words held

  assign empty = (used_q == '0);
  assign full  = (used_q == CW'(DEPTH));

  wire take_w = write_en && !full;
  wire take_r = read_en && !empty;

  function automatic logic [AW-1:0] next(input logic [AW-1:0] p);
    if (p == AW'(DEPTH - 1)) return '0;
    return p + 1'b1;
  endfunction

  always_ff @(posedge clk)
    if (take_w) mem[wptr_q] <= write_data;

  always_ff @(posedge clk or negedge rst_n)
    if (!rst_n) begin
      wptr_q <= '0; rptr_q <= '0; used_q <= '0;
      read_valid <= 1'b0; read_data <= '0; overflow <= 1'b0;
    end else begin
      if (take_w) wptr_q <= next(wptr_q);
      if (take_r) begin
        rptr_q    <= next(rptr_q);
        read_data <= mem[rptr_q];
      end
      read_valid <= take_r;
      if (take_w && !take_r)      used_q <= used_q + 1'b1;
      else if (take_r && !take_w) used_q <= used_q - 1'b1;
      if (write_en && full) overflow <= 1'b1;
    end
endmodule

// burst_buf: the receive buffer, sized from its pattern. The producer sends bursts of up to BURST
// words, one per cycle; the consumer waits up to STALL cycles, then reads in the last cycle of
// every PERIOD. DEPTH is the smallest that loses no word of the longest burst with the longest stall.
module burst_buf #(
  parameter int BURST  = 16,   // the longest burst: words at one per cycle
  parameter int PERIOD = 2,    // the consumer reads one word every PERIOD cycles (2 or more)
  parameter int STALL  = 4,    // the longest wait before the consumer's first read cycle
  parameter int WIDTH  = 8
) (
  input  logic             clk,
  input  logic             rst_n,         // asynchronous, active-low
  input  logic             write_en,
  input  logic [WIDTH-1:0] write_data,
  input  logic             read_en,
  output logic [WIDTH-1:0] read_data,
  output logic             read_valid,
  output logic             full,
  output logic             empty,
  output logic             overflow       // a write was refused: a word was lost
);
  localparam int READS = BURST / PERIOD;                      // reads inside the longest burst
  localparam int PEAK  = BURST - READS;                       // the most words held
  // Both accept decisions use the count before the edge: when the last word of the burst
  // arrives in a cycle with a read, a full FIFO would refuse it, so that case needs one more word.
  localparam int DEPTH = PEAK + (((BURST - STALL) % PERIOD == 0) ? 1 : 0);

  sync_fifo #(.DEPTH(DEPTH), .WIDTH(WIDTH)) u_fifo (
    .clk(clk), .rst_n(rst_n), .write_en(write_en), .write_data(write_data), .read_en(read_en),
    .read_data(read_data), .read_valid(read_valid), .full(full), .empty(empty), .overflow(overflow));
endmodule