ASIC Point

Silicon Lab

Analog & Mixed-Signal Problems

Build a design, hunt its bugs, or repair what fails. Every answer runs on a real simulator.

Build starts from a specification: make it work, then make it small or fast. Bug Hunt asks for the checker or the test that catches broken designs. Repair hands you a failure: find the cause, then fix the design.

Analog · E1 Circuits and SPICE

  1. E1.4.1 The least capacitance 1350 Optimize Hard Verilator

Analog · E2 The MOS Transistor

  1. E2.7.1 The same current at every corner 1350 Optimize Hard Verilator

Analog · E3 Single-Transistor Amplifiers

  1. E3.7.1 The smallest cascode sink 1350 Optimize Hard Verilator

Analog · E4 Current Mirrors and Bias

  1. E4.3.1 The leanest wide-swing sink 1350 Optimize Hard Verilator

Analog · E5 Differential Pairs and Op-Amps

  1. E5.6.1 The smallest buffer 1425 Optimize Hard Verilator

Analog · E6 Frequency Response and Stability

  1. E6.6.1 Stable from 1 to 5 pF on less current 1425 Optimize Hard Verilator

Analog · E7 Noise, Mismatch and Variation

  1. E7.5.1 Offset by the square micrometre 1425 Optimize Hard Verilator

Analog · E8 Capstones and the Mixed-Signal Edge

  1. E8.3.1 Linear on the least switch area 1350 Optimize Hard Verilator