ASIC Point

Silicon Lab

Analog & Mixed-Signal Problems

Build a design, hunt its bugs, or repair what fails. Every answer runs on a real simulator.

Build starts from a specification: make it work, then make it small or fast. Bug Hunt asks for the checker or the test that catches broken designs. Repair hands you a failure: find the cause, then fix the design.

Analog · E1 Circuits and SPICE

  1. E1.3.1 A bench for the RC delay cell 1200 Verify Medium Verilator

Analog · E2 The MOS Transistor

  1. E2.6.1 A bench for the sleep switch 1275 Verify Medium Verilator

Analog · E3 Single-Transistor Amplifiers

  1. E3.5.1 A bench for the source follower 1275 Verify Medium Verilator

Analog · E4 Current Mirrors and Bias

  1. E4.7.1 Catch the bad bias block 1275 Verify Medium Verilator

Analog · E5 Differential Pairs and Op-Amps

  1. E5.3.1 A bench for the five-transistor OTA 1275 Verify Medium Verilator

Analog · E6 Frequency Response and Stability

  1. E6.5.1 A phase-margin bench for a gain of two 1425 Verify Hard Verilator

Analog · E7 Noise, Mismatch and Variation

  1. E7.6.1 Nine settings, one verdict 1350 Verify Medium Verilator

Analog · E8 Capstones and the Mixed-Signal Edge

  1. E8.4.1 Break the DAC buffer 1425 Verify Hard Verilator