Mismatch and Pelgrom's law

Measure the random difference between transistors drawn alike, predict it from their area with Pelgrom's law, and turn it into the current error of a mirror.

Lesson: E7.4
Time: 30 min
Runs on: ngspice
Check: 5 questions

A current mirror copied a bias current with two NMOS transistors drawn at W/L = 1/1 µm to save area. On 30 simulated chips the copy was off by anything from −19.6 % to +12.4 %, with a spread of 7.43 %. Nothing was wrong with the drawing: small transistors simply differ more.

HistogramCurrent error of 30 pairs drawn at W/L = 1/1Each pair has both gates at 0.7 V and both drains at 0.9 V. The error is the difference of the two currents over their mean.

Read the histogram as a table

Current error from	to	Pairs
-24%	-20%	0
-20%	-16%	1
-16%	-12%	2
-12%	-8%	1
-8%	-4%	5
-4%	0%	5
0%	4%	5
4%	8%	8
8%	12%	2
12%	16%	1

30 values in 10 bins.

The lab netlist on ngspice 42 with the SKY130 mismatch model on and seed 5: mean −0.28 %, standard deviation 7.43 %.

Every random error between matched devices shrinks as the square root of their area, and 1 µm² has very little area.

What the model varies

Two transistors drawn identically are never quite identical, because the number of dopant atoms under each gate is random and the gate edges are rough. So each device's threshold voltage V_th sits a little above or below the typical value. The random difference between two devices drawn alike is mismatch.

One pair of the labBoth gates at V_G = 0.7 V, both drains at V_D = 0.9 V. VA and VB are 0 V sources that read each drain current.

Drawn alike
Same W and L, same V_GS, same V_DS. Identical devices would carry exactly the same current.
One threshold is different
With mismatch on, each device draws its own threshold shift. A device with a lower V_th carries more current, and VA and VB read the difference.
I_A · I_B

Read the circuit as text

VA voltage source (0 V): + → d, − → n1
VB voltage source (0 V): + → d, − → n2
XA NMOS transistor (1/1): gate → g, drain → n1, source → n3
XB NMOS transistor (1/1): gate → g, drain → n2, source → n3
VG voltage source (0.7 V): + → g, − → 0
VD voltage source (0.9 V): + → d, − → n3

g = 0.7 V
d = 0.9 V

Bodies at ground. The lab repeats this pair 30 times as subcircuit instances.

The lab runs 30 such pairs in one netlist, all measured by one operating-point run. At W/L = 1/1 the threshold differences have a standard deviation σ(ΔV_th) of 5.513 mV and a mean of 0.215 mV, near zero as random errors should be. The current errors have σ = 7.43 %.

In the SKY130 models of nfet_01v8 and pfet_01v8, mismatch is a threshold shift only. Each device instance adds a Gaussian term to its threshold through delvto, scaled by 1/√(W·L) and by a matching constant. The term is multiplied by a switch, MC_MM_SWITCH, which the library sets to 0. An oxide-thickness mismatch line is in the model file, but it is commented out.

Pelgrom's law

Average a random effect over a larger gate and more of it cancels. Pelgrom's law (1989) states the result for a pair: σ(ΔV_th) = A_VT/√(W·L). A_VT is the process's matching coefficient, in mV·µm, so four times the area halves the mismatch.

The SKY130 model file gives 3.356 mV·µm per NFET device and says a pair differs by that constant times √(2/area). So for a pair, A_VT = √2 × 3.356 = 4.746 mV·µm. The model also multiplies small devices' shifts by a size factor: 1.35 at 1/1, 1.13 at 2/2, 1.04 at 4/4.

DC sweepThreshold mismatch of a pair against 1/√(W·L)The straight line is Pelgrom's law with A_VT = 4.746 mV·µm. The curve adds the model's size factor for square devices. The points are 20 measured pairs at each size.

Pelgrom, 4.746 mV·µm
model, square devices

1/sqrt(W·L) (1/µm) 0.25Pelgrom, 4.746 mV·µm = 1.187 mV · model, square devices = 1.23 mV
The 4/4 pairs, 16 µm²: 1.131 mV measured, 1.230 mV on the model curve.
1/sqrt(W·L) (1/µm) 0.5Pelgrom, 4.746 mV·µm = 2.373 mV · model, square devices = 2.677 mV
The 2/2 pairs, 4 µm²: 2.895 mV measured against 2.677 mV on the curve. A quarter of the area, about twice the mismatch.
1/sqrt(W·L) (1/µm) 1Pelgrom, 4.746 mV·µm = 4.746 mV · model, square devices = 6.398 mV
The 1/1 pairs, 1 µm²: the model curve is 6.398 mV, 35 % above the straight line's 4.746 mV. That is the model's size factor. The 20 pairs measure 5.103 mV.

Read the plot as a table

1/sqrt(W·L) (1/µm)	Pelgrom, 4.746 mV·µm	model, square devices
0.2	949.2 µV	968.3 µV
0.25	1.187 mV	1.23 mV
0.3	1.424 mV	1.501 mV
0.4	1.898 mV	2.07 mV
0.5	2.373 mV	2.677 mV
0.6	2.848 mV	3.325 mV
0.7	3.322 mV	4.018 mV
0.8	3.797 mV	4.759 mV
0.9	4.271 mV	5.551 mV
1	4.746 mV	6.398 mV

Measured on ngspice 42 with 20 pairs per size and seed 5. The 10/1 device is not square, so it sits near the line and off the curve.

A straight line through the origin fitted to the four points has a slope of 5.144 mV·µm, 8 % above the file's 4.746. Two things pull it: the size factor lifts the small devices, and each point is itself a sample.

A standard deviation estimated from N samples is uncertain by about σ/√(2N): ±16 % for 20 pairs, ±13 % for 30. The lab's 30 pairs at 1/1 gave 5.513 mV and the figure's 20 gave 5.103 mV; the model expects 6.398. When the number matters, use hundreds of samples.

Pair	Expected σ(ΔV_th) from the model file	Measured
NMOS 1/1	6.398 mV	5.103 mV (20 pairs), 5.513 mV (30 pairs)
NMOS 2/2	2.677 mV	2.895 mV (20 pairs), 2.135 mV (another 20)
NMOS 4/4	1.230 mV	1.131 mV (20 pairs)
PMOS 2/2	4.141 mV	4.479 mV (20 pairs)

The PMOS constant is 5.856 mV·µm per device, with no size factor on its mismatch term.

From threshold to current

A mirror copies a current by giving two devices the same V_GS. A threshold error ΔV_th then changes the copy by ΔI_D = g_mΔV_th. So the relative error is σ(ΔI/I) = (g_m/I_D) · σ(ΔV_th). The transconductance efficiency g_m/I_D (E2.5) is high in weak inversion and low at large overdrive.

DC sweepCurrent mismatch of 20 pairs at 2/2 against V_GSAbove: the measured σ(ΔI/I) and the prediction g_m/I_D · σ(ΔV_th). Below: g_m/I_D of one device.

measured σ(ΔI/I)
gm/ID × σ(ΔVth)
gm/ID

Gate voltage 595 mVmeasured σ(ΔI/I) = 4.249% · gm/ID × σ(ΔVth) = 4.271% · gm/ID = 20 S/A
At V_GS = 0.595 V the devices are near weak inversion, g_m/I_D = 20: the current error is 4.25 %.
Gate voltage 802.5 mVmeasured σ(ΔI/I) = 1.713% · gm/ID × σ(ΔVth) = 1.708% · gm/ID = 8 S/A
At 0.802 V, g_m/I_D = 8: the same devices give 1.71 %. The thresholds did not change; the current's sensitivity to them did.

Read the plot as a table

Gate voltage	measured σ(ΔI/I)	gm/ID × σ(ΔVth)	gm/ID
400 mV	5.413%	5.422%	25.39 S/A
595 mV	4.249%	4.271%	20 S/A
600 mV	4.188%	4.21%	19.71 S/A
800 mV	1.73%	1.726%	8.082 S/A
802.5 mV	1.713%	1.708%	8 S/A
1 V	0.9418%	0.9104%	4.263 S/A
1.2 V	0.6638%	0.615%	2.88 S/A
1.4 V	0.5188%	0.4562%	2.136 S/A

Measured on ngspice 42, seed 5. The threshold spread of these 20 pairs is 2.135 mV.

The measured curve sits on the prediction: 1.71 % against 1.708 % at g_m/I_D = 8, and 4.25 % against 4.27 % at 20. A mirror biased for high g_m/I_D matches currents worse, so give mirror devices a large overdrive or more area.

A differential pair is the other way round. Its offset is the input voltage that balances the currents, so a threshold error refers to the input one to one, at any g_m/I_D. Real silicon also mismatches the current factor β (mobility and oxide), and that part reaches a pair's input divided by g_m/I_D. This model leaves β out, so that half is theory here, not a run.

Asked in interviews

State Pelgrom's law.
The standard deviation of a parameter difference between two devices drawn alike falls as one over the square root of their area: σ(ΔV_th) = A_VT/√(W·L). Four times the area halves the mismatch.
How do you size a pair for a 1 mV offset?
Decide how many σ the spec must cover, say 3σ = 1 mV, so σ = 0.33 mV. Then W·L ≥ (A_VT/σ)². With A_VT = 4.75 mV·µm that is about 200 µm² per device, before the load's share.
Why do current mirrors match worse at low overdrive?
The current error is g_m/I_D times the threshold error, and g_m/I_D rises toward weak inversion. On 2/2 SKY130 pairs: 1.71 % at g_m/I_D = 8 and 4.25 % at 20.
What does a Monte Carlo run model that a corner run does not?
Each device gets its own random draw, so devices differ from each other: offset, mirror error, mismatch. A corner moves every device of a type the same way and cannot show a difference between two of them.

Try it

Run it: print lists every pair's threshold difference in mV and current error in %, and the meas lines give their mean, standard deviation and extremes. sigma_ir ≈ gm_id × sigma_vt / 10 (mV and % units).

Now set wp=4 lp=4 and predict sigma_vt before you run: Pelgrom says a quarter, the size factor a little less. Then change the seed to 6 and see the sample itself change while σ stays near the same value.

SPICEngspice 42 · simulator service

Edit the netlist, then run it

Expected measurements: sigma_vt = 5.513049e+00 mean_vt = 2.150386e-01 sigma_ir = 7.426176e+00 mean_ir = -2.796932e-01 min_ir = -1.961512e+01 max_ir = 1.243447e+01 gm_id = 1.387842e+01 id1 = 1.635944e-06

Check yourself

Predict the outputThis is the lab's bench with five pairs at 1/1, the seed set, but no .param MC_MM_SWITCH=1 line. Type the line meas prints for the standard deviation of the threshold differences (format: sigma_vt = 6.319360e-01).

* five matched NMOS pairs, 1/1, with the lean library as it loads (no MC_MM_SWITCH line)
.lib sky130 tt
.options seed=5
.subckt pair g d
VA d da 0
VB d db 0
XA da g 0 0 sky130_fd_pr__nfet_01v8 W=1 L=1
XB db g 0 0 sky130_fd_pr__nfet_01v8 W=1 L=1
.ends
VG g 0 0.7
VD d 0 0.9
X1 g d pair
X2 g d pair
X3 g d pair
X4 g d pair
X5 g d pair
.control
op
let dvt1 = 1000*(@m.x1.xa.msky130_fd_pr__nfet_01v8[vth][email protected]_fd_pr__nfet_01v8[vth])
let dvt2 = 1000*(@m.x2.xa.msky130_fd_pr__nfet_01v8[vth][email protected]_fd_pr__nfet_01v8[vth])
let dvt3 = 1000*(@m.x3.xa.msky130_fd_pr__nfet_01v8[vth][email protected]_fd_pr__nfet_01v8[vth])
let dvt4 = 1000*(@m.x4.xa.msky130_fd_pr__nfet_01v8[vth][email protected]_fd_pr__nfet_01v8[vth])
let dvt5 = 1000*(@m.x5.xa.msky130_fd_pr__nfet_01v8[vth][email protected]_fd_pr__nfet_01v8[vth])
compose dvt values dvt1 dvt2 dvt3 dvt4 dvt5
dc VD 0.9 1 0.1
let s = stddev(op1.dvt)*(1+0*v(d))
meas dc sigma_vt FIND s AT=0.9
.endc
.end

ConceptA pair of 2/2 devices has σ(ΔV_th) = 2.7 mV. Ignoring the model's size factor, what does a pair of 4/4 devices give?

0.68 mV1.9 mV2.7 mV, because W/L is the same1.35 mV

ConceptA mirror runs at g_m/I_D = 8 and must copy a current within 1 % (one σ). With A_VT = 4.75 mV·µm and no size factor, which device size is the smallest that meets it?

W/L = 4/4W/L = 2/2W/L = 1/1W/L = 10/0.5

ConceptWhy does a current mirror biased in weak inversion match currents worse than the same mirror at large overdrive?

The threshold mismatch itself grows larger in weak inversionΔI/I is g_m/I_D times ΔV_th, and g_m/I_D peaks in weak inversionWeak inversion adds a current-factor mismatch that strong inversion lacksOutput resistance is lower in weak inversion, so V_DS errors dominate

ConceptOn the Pelgrom plot, what does the slope of the straight line through the origin give?

The threshold voltage of a 1 µm² deviceThe model's size factor for small devicesA_VT, the matching coefficient, in mV·µmThe mean threshold difference per unit area

Remember

Mismatch is the random difference between devices drawn alike; for a pair σ(ΔV_th) = A_VT/√(W·L): four times the area halves it.
SKY130's nfet_01v8 and pfet_01v8 mismatch is a threshold shift only, A_VT ≈ 4.75 mV·µm (NMOS) and 8.28 mV·µm (PMOS) for a pair, plus a size factor that makes small NMOS devices worse.
Turn it on with .param MC_MM_SWITCH=1 after the .lib line, unroll the copies in one netlist, and fix the seed so every run repeats.
A mirror's current error is g_m/I_D times the threshold error, so mirrors match best at large overdrive; 30 samples estimate σ only to about ±13 %.