The power grid and well taps

Tie every cell's supply and well pins to the right net, build the SKY130 grid from met1 rails to met5 straps, place the well taps, and measure what the grid costs in routing.

Lesson: L3.4
Time: 30 min
Runs on: OpenROAD
Check: 5 questions

An engineer left out the one line that joins the cells' n-well pins to the supply. The grid built cleanly and check_power_grid reported every VDD shape connected, yet all 27 n-well pins of the counter were on no net.

Power steps	What the tool printed	n-well pins on no net	Grid check
Global connections, then pdngen	`[INFO PDN-0001] Inserting grid: grid` `[INFO PSM-0040] All shapes on net VDD are connected.`	0 of 27	passes
Global connections without the VPB line, then pdngen	`[INFO PDN-0001] Inserting grid: grid` `[INFO PSM-0040] All shapes on net VDD are connected.`	27 of 27	passes
pdngen with no global connections	`[ERROR PDN-1002] Unable to find power net: VDD` `[ERROR PSM-0028] Cannot find net VDD in the design.`	27 of 27	fails: `PSM-0028`

R2.4's counter at 20 % utilization, three orders of the power steps (the flow's own floorplan steps, OpenROAD 26Q2 on sky130hd).

A passing grid check does not establish that every intended pin joined its net; audit pin connectivity as above, then verify the extracted layout against the schematic (L7.3).

Four pins, two nets

Every sky130_fd_sc_hd logic cell has four supply pins. VPWR and VGND are its supply and ground, on met1. VPB is the n-well under its PMOS transistors and VNB the p-well under its NMOS; their LEF layers are nwell and pwell.

Global connections say which net each pin pattern joins, for every instance:

add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VPWR} -power
add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VPB}
add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VGND} -ground
add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VNB}
global_connect

They must come first. With none at all, the grid generator stops at once: there is no VDD net to build. With one line missing it builds, as the hook showed, and the missing pins stay floating.

The grid, layer by layer

The power distribution network (PDN) carries current from the block's power pins to every cell. It runs from wide, low-resistance metal at the top down to thin rails at the cells. On this platform it has three layers of wire:

Layer	Shape	Direction	Width	Pitch	Sheet resistance
`met1`	Followpin rails along every row edge	horizontal	0.48 µm	5.44 µm per net	0.125 Ω/sq
`met4`	Straps across the rows	vertical	1.60 µm	27.14 µm per net	0.047 Ω/sq
`met5`	Straps; the block's power pins	horizontal	1.60 µm	27.20 µm per net	0.0285 Ω/sq

The platform's pdn.tcl (widths and pitches) and the pinned tech LEF (sheet resistance). There is no ring around the core.

Followpin rails are met1 stripes on the row boundaries, where the cells' VPWR and VGND edges meet. Each rail is shared by the two rows that touch it (L1.5), so one net's rails repeat every two rows.

LayoutThe FIFO's floorplan: taps and straps32 rows, 102 tap cells, 6 met4 straps and 6 met5 straps.

Tap cells
Logic
Buffers and inverters
Flip-flops
Power stripes
I/O pins

Stage: Floorplan
Cell area: 5,654.2 µm²
Utilization: 73.2 %
Worst max slack: 6.1537 ns
Total negative max slack: 0.0000 ns
Worst min slack: 0.4241 ns

Taps and straps
The met4 straps run up the core and the met5 straps across it. Within each 27.14 µm of met4, the VSS strap comes first, centred 13.57 µm from the core edge, and the VDD strap half a pitch later, at 27.14 µm.

Read the layout as text

sync_fifo: die 98.86 × 98.86 µm, core 88.78 × 87.04 µm, 32 rows of 2.72 µm, 23 signal pins.

Stage	Cell area	Utilization	Worst max slack	Total negative max slack	Worst min slack	Cells placed
Floorplan	5,654.2 µm²	73.2 %	6.1537 ns	0.0000 ns	0.4241 ns	102 tap cells; I/O pins not placed yet

Measured with OpenROAD 26Q2 on sky130hd at 70 % utilization. The met1 rails are the thin stripes along the row edges; the vias are not drawn.

Two straps of the same net are one full pitch apart: 27.14 µm here. That is the distance L3.5's IR-drop model needs. A via stack joins a met1 rail to crossing met4 straps of the same net, through met2 and met3, and joins same-net crossings of met4 and met5. VDD and VSS crossings stay insulated. The block's VDD and VSS pins sit on met5.

The straps need room. pdngen checks that the offset and one whole pair fit, strap, gap and strap: 13.57 + 1.60 + 11.97 + 1.60 = 28.74 µm. At 40 % the counter's core is only 28.52 µm wide, and pdngen stops with PDN-0185, insufficient width to add straps on met4. At 20 % it fits:

LayoutThe counter at 20 %: one strap pair just fitsA 40.02 µm wide core with one VSS and one VDD strap on each layer.

Tap cells
Logic
Buffers and inverters
Flip-flops
Power stripes
I/O pins

Stage: Floorplan
Cell area: 347.8 µm²
Utilization: 22.8 %
Worst max slack: 3.8370 ns
Total negative max slack: 0.0000 ns
Worst min slack: 0.4594 ns

One pair
1 VSS and 1 VDD strap on met4, with 16 taps.

Read the layout as text

modn: die 50.49 × 50.49 µm, core 40.02 × 38.08 µm, 14 rows of 2.72 µm, 11 signal pins.

Stage	Cell area	Utilization	Worst max slack	Total negative max slack	Worst min slack	Cells placed
Floorplan	347.8 µm²	22.8 %	3.8370 ns	0.0000 ns	0.4594 ns	16 tap cells; I/O pins not placed yet

Measured with OpenROAD 26Q2 on sky130hd.

Well taps

A CMOS cell's n-well must sit at the supply and the p-type substrate at ground. The wells and diffusions form parasitic bipolar devices that can act as a thyristor. Inadequate ties increase the risk that it switches on and shorts supply to ground: latch-up. A tap is a contacted connection from a well to its rail, and every n-well needs one (SkyWater rule nwell.4).

This library leaves the taps to a separate cell, tapvpwrvgnd_1, one site wide. Its LEF puts VPWR on met1 and nwell, and VGND on met1 and pwell: it is the bridge from the rails into the wells. The logic cells bring their wells out only as VPB and VNB pins.

tapcell -distance 14 inserts the taps right after the rows exist, before the grid, so later cells are placed around them. In the FIFO above the bottom and top rows get a tap every 13.80 µm. The rows between get one every 27.60 µm, shifted by half that from row to row: a checkerboard. 102 taps in 32 rows.

Layer	Routing resource with no grid	With the platform grid	Taken by the grid	met4 pitch halved	met4 pitch doubled
`met1`	2731	2577	5.6 %	5.6 %	5.6 %
`met2`	2910	2502	14.0 %	27.9 %	6.0 %
`met3`	1950	1824	6.5 %	12.9 %	2.8 %
`met4`	1350	1248	7.6 %	22.8 %	3.3 %

Global routing's resource per layer for the MAC at 40 %, from its congestion report (the flow's steps with the met4 strap pitch changed).

The grid costs routing. Each strap and via stack covers tracks that signals can no longer use. The platform grid takes 7.6 % of met4, and halving the met4 pitch takes 22.8 %. met2 loses more than met4, 14.0 %: every via stack from a rail to a strap passes through it.

Asked in interviews

Describe a standard-cell power grid.
Followpin rails on met1 along the rows feed the cells. Straps on upper layers (met4 and met5 here) cross them and bring current from the power pins. Via stacks join the layers where they cross.
What are tap cells, and why are they needed?
Cells that connect the n-well to VDD and the substrate to VSS. Without them the wells float, and the parasitic thyristor in CMOS can latch up. This library has no taps inside the logic cells, so the flow inserts them along every row.
What is latch-up?
A parasitic PNPN structure formed by the wells and diffusions turns on and shorts the supply to ground. Tying the wells firmly to their rails at short intervals keeps it off.
Why are power straps on the top layers?
The top layers are the thickest, with the lowest sheet resistance, so they carry current with the least voltage drop. The thin lower layers keep their dense tracks for signals.

Try it

Run the counter's floorplan. In Layout, find the met4 and met5 straps and the tap checkerboard; Output lists the instances, logic cells plus taps.

Now raise the utilization to 40 %. The core shrinks below 28.74 µm and the run stops in the grid with PDN-0185. Try an aspect ratio of 0.5 at 40 %: a wider, flatter core makes room again.

FLOWOpenROAD 26Q2 · sky130hd · simulator service

Edit the constraints, then run them

Utilization (%)Aspect ratio

Expected: floorplan instances 43 floorplan utilization 22.82 %

Read the netlist: modn.v

module modn (clk, rst_n, count, tc);
  input clk;
  input rst_n;
  output [7:0] count;
  output tc;
  wire _00_, _01_, _02_, _03_, _04_, _05_, _06_, _07_, _08_;
  wire _09_, _10_, _11_, _12_, _13_, _14_, _15_, _16_, _17_;
  sky130_fd_sc_hd__clkinv_1 _18_ (.A(count[0]), .Y(_00_));
  sky130_fd_sc_hd__and3_1 _19_ (.A(count[0]), .B(count[2]), .C(count[1]), .X(_08_));
  sky130_fd_sc_hd__nor2_1 _20_ (.A(_10_), .B(_14_), .Y(_05_));
  sky130_fd_sc_hd__xor2_1 _21_ (.A(count[4]), .B(_09_), .X(_04_));
  sky130_fd_sc_hd__xnor2_1 _22_ (.A(count[3]), .B(_08_), .Y(_15_));
  sky130_fd_sc_hd__nor2_1 _23_ (.A(tc), .B(_15_), .Y(_03_));
  sky130_fd_sc_hd__a21oi_1 _24_ (.A1(count[0]), .A2(count[1]), .B1(count[2]), .Y(_16_));
  sky130_fd_sc_hd__nor2_1 _25_ (.A(_08_), .B(_16_), .Y(_02_));
  sky130_fd_sc_hd__xor2_1 _26_ (.A(count[0]), .B(count[1]), .X(_01_));
  sky130_fd_sc_hd__a41oi_1 _27_ (.A1(count[6]), .A2(count[5]), .A3(count[4]), .A4(_09_), .B1(count[7]), .Y(_17_));
  sky130_fd_sc_hd__a311oi_1 _28_ (.A1(count[6]), .A2(count[7]), .A3(_10_), .B1(tc), .C1(_17_), .Y(_07_));
  sky130_fd_sc_hd__and4_1 _29_ (.A(count[0]), .B(count[3]), .C(count[2]), .D(count[1]), .X(_09_));
  sky130_fd_sc_hd__and3_1 _30_ (.A(count[5]), .B(count[4]), .C(_09_), .X(_10_));
  sky130_fd_sc_hd__and4_1 _31_ (.A(count[6]), .B(count[5]), .C(count[4]), .D(_09_), .X(_11_));
  sky130_fd_sc_hd__nor3b_1 _32_ (.A(count[5]), .B(count[4]), .C_N(count[6]), .Y(_12_));
  sky130_fd_sc_hd__and4b_1 _33_ (.A_N(count[3]), .B(count[7]), .C(_08_), .D(_12_), .X(tc));
  sky130_fd_sc_hd__a31oi_1 _34_ (.A1(count[5]), .A2(count[4]), .A3(_09_), .B1(count[6]), .Y(_13_));
  sky130_fd_sc_hd__nor3_1 _35_ (.A(_11_), .B(tc), .C(_13_), .Y(_06_));
  sky130_fd_sc_hd__a21oi_1 _36_ (.A1(count[4]), .A2(_09_), .B1(count[5]), .Y(_14_));
  sky130_fd_sc_hd__dfrtp_1 _37_ (.CLK(clk), .D(_00_), .Q(count[0]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _38_ (.CLK(clk), .D(_01_), .Q(count[1]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _39_ (.CLK(clk), .D(_02_), .Q(count[2]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _40_ (.CLK(clk), .D(_03_), .Q(count[3]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _41_ (.CLK(clk), .D(_04_), .Q(count[4]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _42_ (.CLK(clk), .D(_05_), .Q(count[5]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _43_ (.CLK(clk), .D(_06_), .Q(count[6]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _44_ (.CLK(clk), .D(_07_), .Q(count[7]), .RESET_B(rst_n));
endmodule

Check yourself

Predict the outputThe FIFO's 355 cells are floorplanned at 70 % into 32 rows. The bottom and top rows hold 6 taps each; every row between holds 3. How many instances does the floorplan report?

create_clock -name clk -period 10 [get_ports clk]
set_input_delay 2 -clock clk [delete_from_list [all_inputs] [get_ports clk]]
set_output_delay 2 -clock clk [all_outputs]

Read the netlist: design.v

module sync_fifo (clk, rst_n, write_en, write_data, read_en, read_data, read_valid, full, empty);
  input clk;
  input rst_n;
  input write_en;
  input [7:0] write_data;
  input read_en;
  output [7:0] read_data;
  output read_valid;
  output full;
  output empty;
  wire _000_, _001_, _002_, _003_, _004_, _005_, _006_, _007_, _008_;
  wire _009_, _010_, _011_, _012_, _013_, _014_, _015_, _016_, _017_;
  wire _018_, _019_, _020_, _021_, _022_, _023_, _024_, _025_, _026_;
  wire _027_, _028_, _029_, _030_, _031_, _032_, _033_, _034_, _035_;
  wire _036_, _037_, _038_, _039_, _040_, _041_, _042_, _043_, _044_;
  wire _045_, _046_, _047_, _048_, _049_, _050_, _051_, _052_, _053_;
  wire _054_, _055_, _056_, _057_, _058_, _059_, _060_, _061_, _062_;
  wire _063_, _064_, _065_, _066_, _067_, _068_, _069_, _070_, _071_;
  wire _072_, _073_, _074_, _075_, _076_, _077_, _078_, _079_, _080_;
  wire _081_, _082_, _083_, _084_, _085_, _086_, _087_, _088_, _089_;
  wire _090_, _091_, _092_, _093_, _094_, _095_, _096_, _097_, _098_;
  wire _099_, _100_, _101_, _102_, _103_, _104_, _105_, _106_, _107_;
  wire _108_, _109_, _110_, _111_, _112_, _113_, _114_, _115_, _116_;
  wire _117_, _118_, _119_, _120_, _121_, _122_, _123_, _124_, _125_;
  wire _126_, _127_, _128_, _129_, _130_, _131_, _132_, _133_, _134_;
  wire _135_, _136_, _137_, _138_, _139_, _140_, _141_, _142_, _143_;
  wire _144_, _145_, _146_, _147_, _148_, _149_, _150_, _151_, _152_;
  wire _153_, _154_, _155_, _156_, _157_, _158_, _159_, _160_, _161_;
  wire _162_, _163_, _164_, _165_, _166_, _167_, _168_, _169_, _170_;
  wire _171_, _172_, _173_, _174_, _175_, _176_, _177_, _178_, _179_;
  wire _180_, _181_, _182_, _183_, _184_, _185_, _186_, _187_, _188_;
  wire _189_, _190_, _191_, _192_, _193_, _194_, _195_, _196_, _197_;
  wire _198_, _199_, _200_, _201_, _202_, _203_, _204_, \mem[0][0] , \mem[0][1] ;
  wire \mem[0][2] , \mem[0][3] , \mem[0][4] , \mem[0][5] , \mem[0][6] , \mem[0][7] , \mem[10][0] , \mem[10][1] , \mem[10][2] ;
  wire \mem[10][3] , \mem[10][4] , \mem[10][5] , \mem[10][6] , \mem[10][7] , \mem[11][0] , \mem[11][1] , \mem[11][2] , \mem[11][3] ;
  wire \mem[11][4] , \mem[11][5] , \mem[11][6] , \mem[11][7] , \mem[12][0] , \mem[12][1] , \mem[12][2] , \mem[12][3] , \mem[12][4] ;
  wire \mem[12][5] , \mem[12][6] , \mem[12][7] , \mem[13][0] , \mem[13][1] , \mem[13][2] , \mem[13][3] , \mem[13][4] , \mem[13][5] ;
  wire \mem[13][6] , \mem[13][7] , \mem[14][0] , \mem[14][1] , \mem[14][2] , \mem[14][3] , \mem[14][4] , \mem[14][5] , \mem[14][6] ;
  wire \mem[14][7] , \mem[15][0] , \mem[15][1] , \mem[15][2] , \mem[15][3] , \mem[15][4] , \mem[15][5] , \mem[15][6] , \mem[15][7] ;
  wire \mem[1][0] , \mem[1][1] , \mem[1][2] , \mem[1][3] , \mem[1][4] , \mem[1][5] , \mem[1][6] , \mem[1][7] , \mem[2][0] ;
  wire \mem[2][1] , \mem[2][2] , \mem[2][3] , \mem[2][4] , \mem[2][5] , \mem[2][6] , \mem[2][7] , \mem[3][0] , \mem[3][1] ;
  wire \mem[3][2] , \mem[3][3] , \mem[3][4] , \mem[3][5] , \mem[3][6] , \mem[3][7] , \mem[4][0] , \mem[4][1] , \mem[4][2] ;
  wire \mem[4][3] , \mem[4][4] , \mem[4][5] , \mem[4][6] , \mem[4][7] , \mem[5][0] , \mem[5][1] , \mem[5][2] , \mem[5][3] ;
  wire \mem[5][4] , \mem[5][5] , \mem[5][6] , \mem[5][7] , \mem[6][0] , \mem[6][1] , \mem[6][2] , \mem[6][3] , \mem[6][4] ;
  wire \mem[6][5] , \mem[6][6] , \mem[6][7] , \mem[7][0] , \mem[7][1] , \mem[7][2] , \mem[7][3] , \mem[7][4] , \mem[7][5] ;
  wire \mem[7][6] , \mem[7][7] , \mem[8][0] , \mem[8][1] , \mem[8][2] , \mem[8][3] , \mem[8][4] , \mem[8][5] , \mem[8][6] ;
  wire \mem[8][7] , \mem[9][0] , \mem[9][1] , \mem[9][2] , \mem[9][3] , \mem[9][4] , \mem[9][5] , \mem[9][6] , \mem[9][7] ;
  wire \rptr_q[0] , \rptr_q[1] , \rptr_q[2] , \rptr_q[3] , \rptr_q[4] , take_r, \wptr_q[0] , \wptr_q[1] , \wptr_q[2] ;
  wire \wptr_q[3] , \wptr_q[4] ;
  sky130_fd_sc_hd__clkinv_1 _205_ (.A(\rptr_q[0] ), .Y(_034_));
  sky130_fd_sc_hd__clkinv_1 _206_ (.A(\wptr_q[2] ), .Y(_035_));
  sky130_fd_sc_hd__and2_0 _207_ (.A(_042_), .B(_043_), .X(_044_));
  sky130_fd_sc_hd__a21oi_1 _208_ (.A1(_099_), .A2(_100_), .B1(_103_), .Y(_104_));
  sky130_fd_sc_hd__a21oi_1 _209_ (.A1(_097_), .A2(_098_), .B1(\rptr_q[2] ), .Y(_105_));
  sky130_fd_sc_hd__o21ai_0 _210_ (.A1(_036_), .A2(_095_), .B1(\rptr_q[3] ), .Y(_106_));
  sky130_fd_sc_hd__o22ai_1 _211_ (.A1(\rptr_q[3] ), .A2(_104_), .B1(_105_), .B2(_106_), .Y(_107_));
  sky130_fd_sc_hd__o21ai_0 _212_ (.A1(_056_), .A2(_107_), .B1(_092_), .Y(_022_));
  sky130_fd_sc_hd__a22o_1 _213_ (.A1(\mem[12][1] ), .A2(_065_), .B1(_068_), .B2(\mem[13][1] ), .X(_108_));
  sky130_fd_sc_hd__a221oi_1 _214_ (.A1(\mem[15][1] ), .A2(_057_), .B1(_071_), .B2(\mem[14][1] ), .C1(_108_), .Y(_109_));
  sky130_fd_sc_hd__nand2_1 _215_ (.A(\mem[7][1] ), .B(_057_), .Y(_110_));
  sky130_fd_sc_hd__a22oi_1 _216_ (.A1(\mem[0][1] ), .A2(_065_), .B1(_068_), .B2(\mem[1][1] ), .Y(_111_));
  sky130_fd_sc_hd__a21oi_1 _217_ (.A1(\mem[11][1] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_112_));
  sky130_fd_sc_hd__nor2b_1 _218_ (.A(\wptr_q[3] ), .B_N(\rptr_q[3] ), .Y(_045_));
  sky130_fd_sc_hd__a222oi_1 _219_ (.A1(\mem[8][1] ), .A2(_065_), .B1(_068_), .B2(\mem[9][1] ), .C1(_071_), .C2(\mem[10][1] ), .Y(_113_));
  sky130_fd_sc_hd__a22o_1 _220_ (.A1(\rptr_q[2] ), .A2(_109_), .B1(_112_), .B2(_113_), .X(_114_));
  sky130_fd_sc_hd__nand2_1 _221_ (.A(\rptr_q[3] ), .B(_114_), .Y(_115_));
  sky130_fd_sc_hd__a222oi_1 _222_ (.A1(\mem[4][1] ), .A2(_065_), .B1(_068_), .B2(\mem[5][1] ), .C1(_071_), .C2(\mem[6][1] ), .Y(_116_));
  sky130_fd_sc_hd__a21oi_1 _223_ (.A1(\mem[2][1] ), .A2(_071_), .B1(\rptr_q[2] ), .Y(_117_));
  sky130_fd_sc_hd__nand2_1 _224_ (.A(_111_), .B(_117_), .Y(_118_));
  sky130_fd_sc_hd__a21oi_1 _225_ (.A1(\mem[3][1] ), .A2(_057_), .B1(_118_), .Y(_119_));
  sky130_fd_sc_hd__a31oi_1 _226_ (.A1(\rptr_q[2] ), .A2(_110_), .A3(_116_), .B1(_119_), .Y(_120_));
  sky130_fd_sc_hd__o21ai_0 _227_ (.A1(\rptr_q[3] ), .A2(_120_), .B1(_115_), .Y(_121_));
  sky130_fd_sc_hd__nand2_1 _228_ (.A(read_data[1]), .B(_056_), .Y(_122_));
  sky130_fd_sc_hd__a21oi_1 _229_ (.A1(_035_), .A2(\rptr_q[2] ), .B1(_045_), .Y(_046_));
  sky130_fd_sc_hd__o21ai_0 _230_ (.A1(_056_), .A2(_121_), .B1(_122_), .Y(_021_));
  sky130_fd_sc_hd__nand2_1 _231_ (.A(read_data[2]), .B(_056_), .Y(_123_));
  sky130_fd_sc_hd__a22o_1 _232_ (.A1(\mem[12][2] ), .A2(_065_), .B1(_071_), .B2(\mem[14][2] ), .X(_124_));
  sky130_fd_sc_hd__a22o_1 _233_ (.A1(\mem[15][2] ), .A2(_057_), .B1(_068_), .B2(\mem[13][2] ), .X(_125_));
  sky130_fd_sc_hd__nor2_1 _234_ (.A(_124_), .B(_125_), .Y(_126_));
  sky130_fd_sc_hd__nand2_1 _235_ (.A(\mem[6][2] ), .B(_071_), .Y(_127_));
  sky130_fd_sc_hd__a22oi_1 _236_ (.A1(\mem[11][2] ), .A2(_057_), .B1(_071_), .B2(\mem[10][2] ), .Y(_128_));
  sky130_fd_sc_hd__a22oi_1 _237_ (.A1(\mem[8][2] ), .A2(_065_), .B1(_068_), .B2(\mem[9][2] ), .Y(_129_));
  sky130_fd_sc_hd__a21oi_1 _238_ (.A1(\mem[3][2] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_130_));
  sky130_fd_sc_hd__a222oi_1 _239_ (.A1(\mem[0][2] ), .A2(_065_), .B1(_068_), .B2(\mem[1][2] ), .C1(_071_), .C2(\mem[2][2] ), .Y(_131_));
  sky130_fd_sc_hd__nand4_1 _240_ (.A(_039_), .B(_041_), .C(_044_), .D(_046_), .Y(_047_));
  sky130_fd_sc_hd__a22oi_1 _241_ (.A1(\mem[4][2] ), .A2(_065_), .B1(_068_), .B2(\mem[5][2] ), .Y(_132_));
  sky130_fd_sc_hd__nand3_1 _242_ (.A(\rptr_q[2] ), .B(_127_), .C(_132_), .Y(_133_));
  sky130_fd_sc_hd__a21oi_1 _243_ (.A1(\mem[7][2] ), .A2(_057_), .B1(_133_), .Y(_134_));
  sky130_fd_sc_hd__a21oi_1 _244_ (.A1(_130_), .A2(_131_), .B1(_134_), .Y(_135_));
  sky130_fd_sc_hd__nor2_1 _245_ (.A(\rptr_q[3] ), .B(_135_), .Y(_136_));
  sky130_fd_sc_hd__a21oi_1 _246_ (.A1(_128_), .A2(_129_), .B1(\rptr_q[2] ), .Y(_137_));
  sky130_fd_sc_hd__o21ai_0 _247_ (.A1(_036_), .A2(_126_), .B1(\rptr_q[3] ), .Y(_138_));
  sky130_fd_sc_hd__nor2_1 _248_ (.A(_137_), .B(_138_), .Y(_139_));
  sky130_fd_sc_hd__o31ai_1 _249_ (.A1(_056_), .A2(_136_), .A3(_139_), .B1(_123_), .Y(_020_));
  sky130_fd_sc_hd__nor2_1 _250_ (.A(read_data[3]), .B(take_r), .Y(_140_));
  sky130_fd_sc_hd__a221o_1 _251_ (.A1(\wptr_q[2] ), .A2(_036_), .B1(_042_), .B2(_043_), .C1(_040_), .X(_048_));
  sky130_fd_sc_hd__a21oi_1 _252_ (.A1(\mem[4][3] ), .A2(_065_), .B1(\rptr_q[3] ), .Y(_141_));
  sky130_fd_sc_hd__a222oi_1 _253_ (.A1(\mem[7][3] ), .A2(_057_), .B1(_068_), .B2(\mem[5][3] ), .C1(_071_), .C2(\mem[6][3] ), .Y(_142_));
  sky130_fd_sc_hd__nand2_1 _254_ (.A(_141_), .B(_142_), .Y(_143_));
  sky130_fd_sc_hd__nand2_1 _255_ (.A(\mem[12][3] ), .B(_065_), .Y(_144_));
  sky130_fd_sc_hd__a222oi_1 _256_ (.A1(\mem[15][3] ), .A2(_057_), .B1(_068_), .B2(\mem[13][3] ), .C1(_071_), .C2(\mem[14][3] ), .Y(_145_));
  sky130_fd_sc_hd__nand2_1 _257_ (.A(\mem[8][3] ), .B(_065_), .Y(_146_));
  sky130_fd_sc_hd__a222oi_1 _258_ (.A1(\mem[11][3] ), .A2(_057_), .B1(_068_), .B2(\mem[9][3] ), .C1(_071_), .C2(\mem[10][3] ), .Y(_147_));
  sky130_fd_sc_hd__nand3_1 _259_ (.A(\rptr_q[3] ), .B(_146_), .C(_147_), .Y(_148_));
  sky130_fd_sc_hd__a21oi_1 _260_ (.A1(\mem[1][3] ), .A2(_068_), .B1(\rptr_q[3] ), .Y(_149_));
  sky130_fd_sc_hd__a222oi_1 _261_ (.A1(\mem[3][3] ), .A2(_057_), .B1(_065_), .B2(\mem[0][3] ), .C1(_071_), .C2(\mem[2][3] ), .Y(_150_));
  sky130_fd_sc_hd__a21oi_1 _262_ (.A1(_046_), .A2(_048_), .B1(_038_), .Y(_049_));
  sky130_fd_sc_hd__nand2_1 _263_ (.A(_149_), .B(_150_), .Y(_151_));
  sky130_fd_sc_hd__a31oi_1 _264_ (.A1(\rptr_q[3] ), .A2(_144_), .A3(_145_), .B1(_036_), .Y(_152_));
  sky130_fd_sc_hd__a32oi_1 _265_ (.A1(_036_), .A2(_148_), .A3(_151_), .B1(_152_), .B2(_143_), .Y(_153_));
  sky130_fd_sc_hd__a21oi_1 _266_ (.A1(take_r), .A2(_153_), .B1(_140_), .Y(_019_));
  sky130_fd_sc_hd__a22oi_1 _267_ (.A1(\mem[12][4] ), .A2(_065_), .B1(_068_), .B2(\mem[13][4] ), .Y(_154_));
  sky130_fd_sc_hd__nand2_1 _268_ (.A(\mem[15][4] ), .B(_057_), .Y(_155_));
  sky130_fd_sc_hd__nand2_1 _269_ (.A(\mem[14][4] ), .B(_071_), .Y(_156_));
  sky130_fd_sc_hd__nand2_1 _270_ (.A(\mem[6][4] ), .B(_071_), .Y(_157_));
  sky130_fd_sc_hd__a22oi_1 _271_ (.A1(\mem[0][4] ), .A2(_065_), .B1(_068_), .B2(\mem[1][4] ), .Y(_158_));
  sky130_fd_sc_hd__nand2_1 _272_ (.A(\mem[2][4] ), .B(_071_), .Y(_159_));
  sky130_fd_sc_hd__xor2_1 _273_ (.A(\wptr_q[4] ), .B(\rptr_q[4] ), .X(_050_));
  sky130_fd_sc_hd__a21oi_1 _274_ (.A1(\mem[11][4] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_160_));
  sky130_fd_sc_hd__a222oi_1 _275_ (.A1(\mem[8][4] ), .A2(_065_), .B1(_068_), .B2(\mem[9][4] ), .C1(_071_), .C2(\mem[10][4] ), .Y(_161_));
  sky130_fd_sc_hd__nand2_1 _276_ (.A(_160_), .B(_161_), .Y(_162_));
  sky130_fd_sc_hd__nand4_1 _277_ (.A(\rptr_q[2] ), .B(_154_), .C(_155_), .D(_156_), .Y(_163_));
  sky130_fd_sc_hd__nand2_1 _278_ (.A(_162_), .B(_163_), .Y(_164_));
  sky130_fd_sc_hd__a222oi_1 _279_ (.A1(\mem[7][4] ), .A2(_057_), .B1(_065_), .B2(\mem[4][4] ), .C1(_068_), .C2(\mem[5][4] ), .Y(_165_));
  sky130_fd_sc_hd__nand3_1 _280_ (.A(\rptr_q[2] ), .B(_157_), .C(_165_), .Y(_166_));
  sky130_fd_sc_hd__a21oi_1 _281_ (.A1(\mem[3][4] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_167_));
  sky130_fd_sc_hd__nand3_1 _282_ (.A(_158_), .B(_159_), .C(_167_), .Y(_168_));
  sky130_fd_sc_hd__a21oi_1 _283_ (.A1(_166_), .A2(_168_), .B1(\rptr_q[3] ), .Y(_169_));
  sky130_fd_sc_hd__xnor2_1 _284_ (.A(_049_), .B(_050_), .Y(_051_));
  sky130_fd_sc_hd__a211oi_1 _285_ (.A1(\rptr_q[3] ), .A2(_164_), .B1(_169_), .C1(_056_), .Y(_170_));
  sky130_fd_sc_hd__a21o_1 _286_ (.A1(read_data[4]), .A2(_056_), .B1(_170_), .X(_018_));
  sky130_fd_sc_hd__a22oi_1 _287_ (.A1(\mem[12][5] ), .A2(_065_), .B1(_068_), .B2(\mem[13][5] ), .Y(_171_));
  sky130_fd_sc_hd__nand2_1 _288_ (.A(\mem[15][5] ), .B(_057_), .Y(_172_));
  sky130_fd_sc_hd__nand2_1 _289_ (.A(\mem[14][5] ), .B(_071_), .Y(_173_));
  sky130_fd_sc_hd__a22oi_1 _290_ (.A1(\mem[4][5] ), .A2(_065_), .B1(_068_), .B2(\mem[5][5] ), .Y(_174_));
  sky130_fd_sc_hd__nand2_1 _291_ (.A(\mem[7][5] ), .B(_057_), .Y(_175_));
  sky130_fd_sc_hd__nand2_1 _292_ (.A(\mem[6][5] ), .B(_071_), .Y(_176_));
  sky130_fd_sc_hd__a21oi_1 _293_ (.A1(\mem[11][5] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_177_));
  sky130_fd_sc_hd__a222oi_1 _294_ (.A1(\mem[8][5] ), .A2(_065_), .B1(_068_), .B2(\mem[9][5] ), .C1(_071_), .C2(\mem[10][5] ), .Y(_178_));
  sky130_fd_sc_hd__xor2_1 _295_ (.A(_049_), .B(_050_), .X(_052_));
  sky130_fd_sc_hd__nand2_1 _296_ (.A(_177_), .B(_178_), .Y(_179_));
  sky130_fd_sc_hd__nand4_1 _297_ (.A(\rptr_q[2] ), .B(_171_), .C(_172_), .D(_173_), .Y(_180_));
  sky130_fd_sc_hd__nand2_1 _298_ (.A(_179_), .B(_180_), .Y(_181_));
  sky130_fd_sc_hd__a21oi_1 _299_ (.A1(\mem[3][5] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_182_));
  sky130_fd_sc_hd__a222oi_1 _300_ (.A1(\mem[0][5] ), .A2(_065_), .B1(_068_), .B2(\mem[1][5] ), .C1(_071_), .C2(\mem[2][5] ), .Y(_183_));
  sky130_fd_sc_hd__nand2_1 _301_ (.A(_182_), .B(_183_), .Y(_184_));
  sky130_fd_sc_hd__nand4_1 _302_ (.A(\rptr_q[2] ), .B(_174_), .C(_175_), .D(_176_), .Y(_185_));
  sky130_fd_sc_hd__a21oi_1 _303_ (.A1(_184_), .A2(_185_), .B1(\rptr_q[3] ), .Y(_186_));
  sky130_fd_sc_hd__a211oi_1 _304_ (.A1(\rptr_q[3] ), .A2(_181_), .B1(_186_), .C1(_056_), .Y(_187_));
  sky130_fd_sc_hd__a21o_1 _305_ (.A1(read_data[5]), .A2(_056_), .B1(_187_), .X(_017_));
  sky130_fd_sc_hd__nor2_1 _306_ (.A(_047_), .B(_051_), .Y(full));
  sky130_fd_sc_hd__nand2_1 _307_ (.A(read_data[6]), .B(_056_), .Y(_188_));
  sky130_fd_sc_hd__a22o_1 _308_ (.A1(\mem[12][6] ), .A2(_065_), .B1(_071_), .B2(\mem[14][6] ), .X(_189_));
  sky130_fd_sc_hd__a22o_1 _309_ (.A1(\mem[15][6] ), .A2(_057_), .B1(_068_), .B2(\mem[13][6] ), .X(_190_));
  sky130_fd_sc_hd__nor2_1 _310_ (.A(_189_), .B(_190_), .Y(_191_));
  sky130_fd_sc_hd__nand2_1 _311_ (.A(\mem[6][6] ), .B(_071_), .Y(_192_));
  sky130_fd_sc_hd__a22oi_1 _312_ (.A1(\mem[11][6] ), .A2(_057_), .B1(_071_), .B2(\mem[10][6] ), .Y(_193_));
  sky130_fd_sc_hd__a22oi_1 _313_ (.A1(\mem[8][6] ), .A2(_065_), .B1(_068_), .B2(\mem[9][6] ), .Y(_194_));
  sky130_fd_sc_hd__a21oi_1 _314_ (.A1(\mem[3][6] ), .A2(_057_), .B1(\rptr_q[2] ), .Y(_195_));
  sky130_fd_sc_hd__a222oi_1 _315_ (.A1(\mem[0][6] ), .A2(_065_), .B1(_068_), .B2(\mem[1][6] ), .C1(_071_), .C2(\mem[2][6] ), .Y(_196_));
  sky130_fd_sc_hd__a22oi_1 _316_ (.A1(\mem[4][6] ), .A2(_065_), .B1(_068_), .B2(\mem[5][6] ), .Y(_197_));
  sky130_fd_sc_hd__clkinv_1 _317_ (.A(\rptr_q[2] ), .Y(_036_));
  sky130_fd_sc_hd__o21ai_0 _318_ (.A1(_047_), .A2(_051_), .B1(write_en), .Y(_053_));
  sky130_fd_sc_hd__nand3_1 _319_ (.A(\rptr_q[2] ), .B(_192_), .C(_197_), .Y(_198_));
  sky130_fd_sc_hd__a21oi_1 _320_ (.A1(\mem[7][6] ), .A2(_057_), .B1(_198_), .Y(_199_));
  sky130_fd_sc_hd__a21oi_1 _321_ (.A1(_195_), .A2(_196_), .B1(_199_), .Y(_200_));
  sky130_fd_sc_hd__nor2_1 _322_ (.A(\rptr_q[3] ), .B(_200_), .Y(_201_));
  sky130_fd_sc_hd__a21oi_1 _323_ (.A1(_193_), .A2(_194_), .B1(\rptr_q[2] ), .Y(_202_));
  sky130_fd_sc_hd__o21ai_0 _324_ (.A1(_036_), .A2(_191_), .B1(\rptr_q[3] ), .Y(_203_));
  sky130_fd_sc_hd__nor2_1 _325_ (.A(_202_), .B(_203_), .Y(_204_));
  sky130_fd_sc_hd__o31ai_1 _326_ (.A1(_056_), .A2(_201_), .A3(_204_), .B1(_188_), .Y(_016_));
  sky130_fd_sc_hd__o2111ai_1 _327_ (.A1(_047_), .A2(_051_), .B1(\wptr_q[1] ), .C1(\wptr_q[0] ), .D1(write_en), .Y(_054_));
  sky130_fd_sc_hd__nand2_1 _328_ (.A(\wptr_q[3] ), .B(\wptr_q[2] ), .Y(_055_));
  sky130_fd_sc_hd__nor2_1 _329_ (.A(_054_), .B(_055_), .Y(_015_));
  sky130_fd_sc_hd__xor2_1 _330_ (.A(\wptr_q[4] ), .B(_015_), .X(_033_));
  sky130_fd_sc_hd__nor2_1 _331_ (.A(_047_), .B(_052_), .Y(empty));
  sky130_fd_sc_hd__o21ai_0 _332_ (.A1(_047_), .A2(_052_), .B1(read_en), .Y(_056_));
  sky130_fd_sc_hd__clkinv_1 _333_ (.A(_056_), .Y(take_r));
  sky130_fd_sc_hd__and2_0 _334_ (.A(\rptr_q[0] ), .B(\rptr_q[1] ), .X(_057_));
  sky130_fd_sc_hd__nand2_1 _335_ (.A(\rptr_q[0] ), .B(\rptr_q[1] ), .Y(_058_));
  sky130_fd_sc_hd__clkinv_1 _336_ (.A(\wptr_q[0] ), .Y(_037_));
  sky130_fd_sc_hd__nor2_1 _337_ (.A(_056_), .B(_058_), .Y(_059_));
  sky130_fd_sc_hd__nand3_1 _338_ (.A(\rptr_q[2] ), .B(take_r), .C(_057_), .Y(_060_));
  sky130_fd_sc_hd__nand4_1 _339_ (.A(\rptr_q[3] ), .B(\rptr_q[2] ), .C(take_r), .D(_057_), .Y(_061_));
  sky130_fd_sc_hd__xnor2_1 _340_ (.A(\rptr_q[4] ), .B(_061_), .Y(_032_));
  sky130_fd_sc_hd__o2111ai_1 _341_ (.A1(_047_), .A2(_051_), .B1(\wptr_q[1] ), .C1(_037_), .D1(write_en), .Y(_062_));
  sky130_fd_sc_hd__nor2_1 _342_ (.A(_055_), .B(_062_), .Y(_014_));
  sky130_fd_sc_hd__or3_1 _343_ (.A(\wptr_q[1] ), .B(\wptr_q[0] ), .C(_053_), .X(_063_));
  sky130_fd_sc_hd__nor2_1 _344_ (.A(_055_), .B(_063_), .Y(_012_));
  sky130_fd_sc_hd__nand2_1 _345_ (.A(read_data[7]), .B(_056_), .Y(_064_));
  sky130_fd_sc_hd__nor2_1 _346_ (.A(\rptr_q[0] ), .B(\rptr_q[1] ), .Y(_065_));
  sky130_fd_sc_hd__nor2b_1 _347_ (.A(\rptr_q[3] ), .B_N(\wptr_q[3] ), .Y(_038_));
  sky130_fd_sc_hd__or2_0 _348_ (.A(\rptr_q[0] ), .B(\rptr_q[1] ), .X(_066_));
  sky130_fd_sc_hd__nor2_1 _349_ (.A(\mem[4][7] ), .B(_066_), .Y(_067_));
  sky130_fd_sc_hd__nor2b_1 _350_ (.A(\rptr_q[1] ), .B_N(\rptr_q[0] ), .Y(_068_));
  sky130_fd_sc_hd__nand2b_1 _351_ (.A_N(\rptr_q[1] ), .B(\rptr_q[0] ), .Y(_069_));
  sky130_fd_sc_hd__nor2_1 _352_ (.A(\mem[5][7] ), .B(_069_), .Y(_070_));
  sky130_fd_sc_hd__nor2b_1 _353_ (.A(\rptr_q[0] ), .B_N(\rptr_q[1] ), .Y(_071_));
  sky130_fd_sc_hd__nand2b_1 _354_ (.A_N(\rptr_q[0] ), .B(\rptr_q[1] ), .Y(_072_));
  sky130_fd_sc_hd__o22ai_1 _355_ (.A1(\mem[7][7] ), .A2(_058_), .B1(_072_), .B2(\mem[6][7] ), .Y(_073_));
  sky130_fd_sc_hd__nor4_1 _356_ (.A(\rptr_q[3] ), .B(_067_), .C(_070_), .D(_073_), .Y(_074_));
  sky130_fd_sc_hd__o22ai_1 _357_ (.A1(\mem[15][7] ), .A2(_058_), .B1(_072_), .B2(\mem[14][7] ), .Y(_075_));
  sky130_fd_sc_hd__a21oi_1 _358_ (.A1(_034_), .A2(\wptr_q[0] ), .B1(_038_), .Y(_039_));
  sky130_fd_sc_hd__o221ai_1 _359_ (.A1(\mem[12][7] ), .A2(_066_), .B1(_069_), .B2(\mem[13][7] ), .C1(\rptr_q[3] ), .Y(_076_));
  sky130_fd_sc_hd__nor2_1 _360_ (.A(\mem[0][7] ), .B(_066_), .Y(_077_));
  sky130_fd_sc_hd__o22ai_1 _361_ (.A1(\mem[3][7] ), .A2(_058_), .B1(_072_), .B2(\mem[2][7] ), .Y(_078_));
  sky130_fd_sc_hd__nor3_1 _362_ (.A(\rptr_q[3] ), .B(_077_), .C(_078_), .Y(_079_));
  sky130_fd_sc_hd__o21ai_0 _363_ (.A1(\mem[1][7] ), .A2(_069_), .B1(_079_), .Y(_080_));
  sky130_fd_sc_hd__o22ai_1 _364_ (.A1(\mem[11][7] ), .A2(_058_), .B1(_072_), .B2(\mem[10][7] ), .Y(_081_));
  sky130_fd_sc_hd__o221ai_1 _365_ (.A1(\mem[8][7] ), .A2(_066_), .B1(_069_), .B2(\mem[9][7] ), .C1(\rptr_q[3] ), .Y(_082_));
  sky130_fd_sc_hd__o21ai_0 _366_ (.A1(_081_), .A2(_082_), .B1(_080_), .Y(_083_));
  sky130_fd_sc_hd__o21ai_0 _367_ (.A1(_075_), .A2(_076_), .B1(\rptr_q[2] ), .Y(_084_));
  sky130_fd_sc_hd__o22ai_1 _368_ (.A1(\rptr_q[2] ), .A2(_083_), .B1(_084_), .B2(_074_), .Y(_085_));
  sky130_fd_sc_hd__nor2b_1 _369_ (.A(\rptr_q[1] ), .B_N(\wptr_q[1] ), .Y(_040_));
  sky130_fd_sc_hd__o21ai_0 _370_ (.A1(_056_), .A2(_085_), .B1(_064_), .Y(_031_));
  sky130_fd_sc_hd__or3_1 _371_ (.A(\wptr_q[1] ), .B(_037_), .C(_053_), .X(_086_));
  sky130_fd_sc_hd__nor3_1 _372_ (.A(\wptr_q[3] ), .B(\wptr_q[2] ), .C(_086_), .Y(_001_));
  sky130_fd_sc_hd__nor3_1 _373_ (.A(\wptr_q[3] ), .B(\wptr_q[2] ), .C(_054_), .Y(_003_));
  sky130_fd_sc_hd__nand2b_1 _374_ (.A_N(\wptr_q[3] ), .B(\wptr_q[2] ), .Y(_087_));
  sky130_fd_sc_hd__nor2_1 _375_ (.A(_086_), .B(_087_), .Y(_005_));
  sky130_fd_sc_hd__nor2_1 _376_ (.A(_054_), .B(_087_), .Y(_007_));
  sky130_fd_sc_hd__nand2_1 _377_ (.A(\wptr_q[3] ), .B(_035_), .Y(_088_));
  sky130_fd_sc_hd__nor2_1 _378_ (.A(_086_), .B(_088_), .Y(_009_));
  sky130_fd_sc_hd__nor2_1 _379_ (.A(_054_), .B(_088_), .Y(_011_));
  sky130_fd_sc_hd__a21oi_1 _380_ (.A1(\wptr_q[2] ), .A2(_036_), .B1(_040_), .Y(_041_));
  sky130_fd_sc_hd__nor2_1 _381_ (.A(_055_), .B(_086_), .Y(_013_));
  sky130_fd_sc_hd__nor2_1 _382_ (.A(_063_), .B(_088_), .Y(_008_));
  sky130_fd_sc_hd__nor3_1 _383_ (.A(\wptr_q[3] ), .B(\wptr_q[2] ), .C(_062_), .Y(_002_));
  sky130_fd_sc_hd__nor3_1 _384_ (.A(\wptr_q[3] ), .B(\wptr_q[2] ), .C(_063_), .Y(_000_));
  sky130_fd_sc_hd__nor2_1 _385_ (.A(_063_), .B(_087_), .Y(_004_));
  sky130_fd_sc_hd__nor2_1 _386_ (.A(_062_), .B(_088_), .Y(_010_));
  sky130_fd_sc_hd__nor2_1 _387_ (.A(_062_), .B(_087_), .Y(_006_));
  sky130_fd_sc_hd__xnor2_1 _388_ (.A(\wptr_q[0] ), .B(_053_), .Y(_030_));
  sky130_fd_sc_hd__o21ai_0 _389_ (.A1(_037_), .A2(_053_), .B1(\wptr_q[1] ), .Y(_089_));
  sky130_fd_sc_hd__nand2_1 _390_ (.A(_086_), .B(_089_), .Y(_029_));
  sky130_fd_sc_hd__nand2b_1 _391_ (.A_N(\wptr_q[0] ), .B(\rptr_q[0] ), .Y(_042_));
  sky130_fd_sc_hd__xnor2_1 _392_ (.A(\wptr_q[2] ), .B(_054_), .Y(_028_));
  sky130_fd_sc_hd__o21ai_0 _393_ (.A1(_035_), .A2(_054_), .B1(\wptr_q[3] ), .Y(_090_));
  sky130_fd_sc_hd__o21ai_0 _394_ (.A1(_054_), .A2(_087_), .B1(_090_), .Y(_027_));
  sky130_fd_sc_hd__xnor2_1 _395_ (.A(_034_), .B(take_r), .Y(_026_));
  sky130_fd_sc_hd__o21ai_0 _396_ (.A1(_034_), .A2(_056_), .B1(\rptr_q[1] ), .Y(_091_));
  sky130_fd_sc_hd__o21ai_0 _397_ (.A1(_056_), .A2(_069_), .B1(_091_), .Y(_025_));
  sky130_fd_sc_hd__xnor2_1 _398_ (.A(_036_), .B(_059_), .Y(_024_));
  sky130_fd_sc_hd__xnor2_1 _399_ (.A(\rptr_q[3] ), .B(_060_), .Y(_023_));
  sky130_fd_sc_hd__nand2_1 _400_ (.A(read_data[0]), .B(_056_), .Y(_092_));
  sky130_fd_sc_hd__a22o_1 _401_ (.A1(\mem[15][0] ), .A2(_057_), .B1(_065_), .B2(\mem[12][0] ), .X(_093_));
  sky130_fd_sc_hd__nand2b_1 _402_ (.A_N(\wptr_q[1] ), .B(\rptr_q[1] ), .Y(_043_));
  sky130_fd_sc_hd__a22o_1 _403_ (.A1(\mem[13][0] ), .A2(_068_), .B1(_071_), .B2(\mem[14][0] ), .X(_094_));
  sky130_fd_sc_hd__nor2_1 _404_ (.A(_093_), .B(_094_), .Y(_095_));
  sky130_fd_sc_hd__nand2_1 _405_ (.A(\mem[6][0] ), .B(_071_), .Y(_096_));
  sky130_fd_sc_hd__a22oi_1 _406_ (.A1(\mem[11][0] ), .A2(_057_), .B1(_071_), .B2(\mem[10][0] ), .Y(_097_));
  sky130_fd_sc_hd__a22oi_1 _407_ (.A1(\mem[8][0] ), .A2(_065_), .B1(_068_), .B2(\mem[9][0] ), .Y(_098_));
  sky130_fd_sc_hd__a21oi_1 _408_ (.A1(\mem[2][0] ), .A2(_071_), .B1(\rptr_q[2] ), .Y(_099_));
  sky130_fd_sc_hd__a222oi_1 _409_ (.A1(\mem[3][0] ), .A2(_057_), .B1(_065_), .B2(\mem[0][0] ), .C1(_068_), .C2(\mem[1][0] ), .Y(_100_));
  sky130_fd_sc_hd__a22oi_1 _410_ (.A1(\mem[4][0] ), .A2(_065_), .B1(_068_), .B2(\mem[5][0] ), .Y(_101_));
  sky130_fd_sc_hd__nand3_1 _411_ (.A(\rptr_q[2] ), .B(_096_), .C(_101_), .Y(_102_));
  sky130_fd_sc_hd__a21oi_1 _412_ (.A1(\mem[7][0] ), .A2(_057_), .B1(_102_), .Y(_103_));
  sky130_fd_sc_hd__dfrtp_1 _413_ (.CLK(clk), .D(_030_), .Q(\wptr_q[0] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _414_ (.CLK(clk), .D(_029_), .Q(\wptr_q[1] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _415_ (.CLK(clk), .D(_028_), .Q(\wptr_q[2] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _416_ (.CLK(clk), .D(_027_), .Q(\wptr_q[3] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _417_ (.CLK(clk), .D(_033_), .Q(\wptr_q[4] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _418_ (.CLK(clk), .D(_026_), .Q(\rptr_q[0] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _419_ (.CLK(clk), .D(_025_), .Q(\rptr_q[1] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _420_ (.CLK(clk), .D(_024_), .Q(\rptr_q[2] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _421_ (.CLK(clk), .D(_023_), .Q(\rptr_q[3] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _422_ (.CLK(clk), .D(_032_), .Q(\rptr_q[4] ), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _423_ (.CLK(clk), .D(take_r), .Q(read_valid), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _424_ (.CLK(clk), .D(_022_), .Q(read_data[0]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _425_ (.CLK(clk), .D(_021_), .Q(read_data[1]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _426_ (.CLK(clk), .D(_020_), .Q(read_data[2]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _427_ (.CLK(clk), .D(_019_), .Q(read_data[3]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _428_ (.CLK(clk), .D(_018_), .Q(read_data[4]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _429_ (.CLK(clk), .D(_017_), .Q(read_data[5]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _430_ (.CLK(clk), .D(_016_), .Q(read_data[6]), .RESET_B(rst_n));
  sky130_fd_sc_hd__dfrtp_1 _431_ (.CLK(clk), .D(_031_), .Q(read_data[7]), .RESET_B(rst_n));
  sky130_fd_sc_hd__edfxtp_1 _432_ (.CLK(clk), .D(write_data[0]), .DE(_000_), .Q(\mem[0][0] ));
  sky130_fd_sc_hd__edfxtp_1 _433_ (.CLK(clk), .D(write_data[1]), .DE(_000_), .Q(\mem[0][1] ));
  sky130_fd_sc_hd__edfxtp_1 _434_ (.CLK(clk), .D(write_data[2]), .DE(_000_), .Q(\mem[0][2] ));
  sky130_fd_sc_hd__edfxtp_1 _435_ (.CLK(clk), .D(write_data[3]), .DE(_000_), .Q(\mem[0][3] ));
  sky130_fd_sc_hd__edfxtp_1 _436_ (.CLK(clk), .D(write_data[4]), .DE(_000_), .Q(\mem[0][4] ));
  sky130_fd_sc_hd__edfxtp_1 _437_ (.CLK(clk), .D(write_data[5]), .DE(_000_), .Q(\mem[0][5] ));
  sky130_fd_sc_hd__edfxtp_1 _438_ (.CLK(clk), .D(write_data[6]), .DE(_000_), .Q(\mem[0][6] ));
  sky130_fd_sc_hd__edfxtp_1 _439_ (.CLK(clk), .D(write_data[7]), .DE(_000_), .Q(\mem[0][7] ));
  sky130_fd_sc_hd__edfxtp_1 _440_ (.CLK(clk), .D(write_data[0]), .DE(_001_), .Q(\mem[1][0] ));
  sky130_fd_sc_hd__edfxtp_1 _441_ (.CLK(clk), .D(write_data[1]), .DE(_001_), .Q(\mem[1][1] ));
  sky130_fd_sc_hd__edfxtp_1 _442_ (.CLK(clk), .D(write_data[2]), .DE(_001_), .Q(\mem[1][2] ));
  sky130_fd_sc_hd__edfxtp_1 _443_ (.CLK(clk), .D(write_data[3]), .DE(_001_), .Q(\mem[1][3] ));
  sky130_fd_sc_hd__edfxtp_1 _444_ (.CLK(clk), .D(write_data[4]), .DE(_001_), .Q(\mem[1][4] ));
  sky130_fd_sc_hd__edfxtp_1 _445_ (.CLK(clk), .D(write_data[5]), .DE(_001_), .Q(\mem[1][5] ));
  sky130_fd_sc_hd__edfxtp_1 _446_ (.CLK(clk), .D(write_data[6]), .DE(_001_), .Q(\mem[1][6] ));
  sky130_fd_sc_hd__edfxtp_1 _447_ (.CLK(clk), .D(write_data[7]), .DE(_001_), .Q(\mem[1][7] ));
  sky130_fd_sc_hd__edfxtp_1 _448_ (.CLK(clk), .D(write_data[0]), .DE(_002_), .Q(\mem[2][0] ));
  sky130_fd_sc_hd__edfxtp_1 _449_ (.CLK(clk), .D(write_data[1]), .DE(_002_), .Q(\mem[2][1] ));
  sky130_fd_sc_hd__edfxtp_1 _450_ (.CLK(clk), .D(write_data[2]), .DE(_002_), .Q(\mem[2][2] ));
  sky130_fd_sc_hd__edfxtp_1 _451_ (.CLK(clk), .D(write_data[3]), .DE(_002_), .Q(\mem[2][3] ));
  sky130_fd_sc_hd__edfxtp_1 _452_ (.CLK(clk), .D(write_data[4]), .DE(_002_), .Q(\mem[2][4] ));
  sky130_fd_sc_hd__edfxtp_1 _453_ (.CLK(clk), .D(write_data[5]), .DE(_002_), .Q(\mem[2][5] ));
  sky130_fd_sc_hd__edfxtp_1 _454_ (.CLK(clk), .D(write_data[6]), .DE(_002_), .Q(\mem[2][6] ));
  sky130_fd_sc_hd__edfxtp_1 _455_ (.CLK(clk), .D(write_data[7]), .DE(_002_), .Q(\mem[2][7] ));
  sky130_fd_sc_hd__edfxtp_1 _456_ (.CLK(clk), .D(write_data[0]), .DE(_003_), .Q(\mem[3][0] ));
  sky130_fd_sc_hd__edfxtp_1 _457_ (.CLK(clk), .D(write_data[1]), .DE(_003_), .Q(\mem[3][1] ));
  sky130_fd_sc_hd__edfxtp_1 _458_ (.CLK(clk), .D(write_data[2]), .DE(_003_), .Q(\mem[3][2] ));
  sky130_fd_sc_hd__edfxtp_1 _459_ (.CLK(clk), .D(write_data[3]), .DE(_003_), .Q(\mem[3][3] ));
  sky130_fd_sc_hd__edfxtp_1 _460_ (.CLK(clk), .D(write_data[4]), .DE(_003_), .Q(\mem[3][4] ));
  sky130_fd_sc_hd__edfxtp_1 _461_ (.CLK(clk), .D(write_data[5]), .DE(_003_), .Q(\mem[3][5] ));
  sky130_fd_sc_hd__edfxtp_1 _462_ (.CLK(clk), .D(write_data[6]), .DE(_003_), .Q(\mem[3][6] ));
  sky130_fd_sc_hd__edfxtp_1 _463_ (.CLK(clk), .D(write_data[7]), .DE(_003_), .Q(\mem[3][7] ));
  sky130_fd_sc_hd__edfxtp_1 _464_ (.CLK(clk), .D(write_data[0]), .DE(_004_), .Q(\mem[4][0] ));
  sky130_fd_sc_hd__edfxtp_1 _465_ (.CLK(clk), .D(write_data[1]), .DE(_004_), .Q(\mem[4][1] ));
  sky130_fd_sc_hd__edfxtp_1 _466_ (.CLK(clk), .D(write_data[2]), .DE(_004_), .Q(\mem[4][2] ));
  sky130_fd_sc_hd__edfxtp_1 _467_ (.CLK(clk), .D(write_data[3]), .DE(_004_), .Q(\mem[4][3] ));
  sky130_fd_sc_hd__edfxtp_1 _468_ (.CLK(clk), .D(write_data[4]), .DE(_004_), .Q(\mem[4][4] ));
  sky130_fd_sc_hd__edfxtp_1 _469_ (.CLK(clk), .D(write_data[5]), .DE(_004_), .Q(\mem[4][5] ));
  sky130_fd_sc_hd__edfxtp_1 _470_ (.CLK(clk), .D(write_data[6]), .DE(_004_), .Q(\mem[4][6] ));
  sky130_fd_sc_hd__edfxtp_1 _471_ (.CLK(clk), .D(write_data[7]), .DE(_004_), .Q(\mem[4][7] ));
  sky130_fd_sc_hd__edfxtp_1 _472_ (.CLK(clk), .D(write_data[0]), .DE(_005_), .Q(\mem[5][0] ));
  sky130_fd_sc_hd__edfxtp_1 _473_ (.CLK(clk), .D(write_data[1]), .DE(_005_), .Q(\mem[5][1] ));
  sky130_fd_sc_hd__edfxtp_1 _474_ (.CLK(clk), .D(write_data[2]), .DE(_005_), .Q(\mem[5][2] ));
  sky130_fd_sc_hd__edfxtp_1 _475_ (.CLK(clk), .D(write_data[3]), .DE(_005_), .Q(\mem[5][3] ));
  sky130_fd_sc_hd__edfxtp_1 _476_ (.CLK(clk), .D(write_data[4]), .DE(_005_), .Q(\mem[5][4] ));
  sky130_fd_sc_hd__edfxtp_1 _477_ (.CLK(clk), .D(write_data[5]), .DE(_005_), .Q(\mem[5][5] ));
  sky130_fd_sc_hd__edfxtp_1 _478_ (.CLK(clk), .D(write_data[6]), .DE(_005_), .Q(\mem[5][6] ));
  sky130_fd_sc_hd__edfxtp_1 _479_ (.CLK(clk), .D(write_data[7]), .DE(_005_), .Q(\mem[5][7] ));
  sky130_fd_sc_hd__edfxtp_1 _480_ (.CLK(clk), .D(write_data[0]), .DE(_006_), .Q(\mem[6][0] ));
  sky130_fd_sc_hd__edfxtp_1 _481_ (.CLK(clk), .D(write_data[1]), .DE(_006_), .Q(\mem[6][1] ));
  sky130_fd_sc_hd__edfxtp_1 _482_ (.CLK(clk), .D(write_data[2]), .DE(_006_), .Q(\mem[6][2] ));
  sky130_fd_sc_hd__edfxtp_1 _483_ (.CLK(clk), .D(write_data[3]), .DE(_006_), .Q(\mem[6][3] ));
  sky130_fd_sc_hd__edfxtp_1 _484_ (.CLK(clk), .D(write_data[4]), .DE(_006_), .Q(\mem[6][4] ));
  sky130_fd_sc_hd__edfxtp_1 _485_ (.CLK(clk), .D(write_data[5]), .DE(_006_), .Q(\mem[6][5] ));
  sky130_fd_sc_hd__edfxtp_1 _486_ (.CLK(clk), .D(write_data[6]), .DE(_006_), .Q(\mem[6][6] ));
  sky130_fd_sc_hd__edfxtp_1 _487_ (.CLK(clk), .D(write_data[7]), .DE(_006_), .Q(\mem[6][7] ));
  sky130_fd_sc_hd__edfxtp_1 _488_ (.CLK(clk), .D(write_data[0]), .DE(_007_), .Q(\mem[7][0] ));
  sky130_fd_sc_hd__edfxtp_1 _489_ (.CLK(clk), .D(write_data[1]), .DE(_007_), .Q(\mem[7][1] ));
  sky130_fd_sc_hd__edfxtp_1 _490_ (.CLK(clk), .D(write_data[2]), .DE(_007_), .Q(\mem[7][2] ));
  sky130_fd_sc_hd__edfxtp_1 _491_ (.CLK(clk), .D(write_data[3]), .DE(_007_), .Q(\mem[7][3] ));
  sky130_fd_sc_hd__edfxtp_1 _492_ (.CLK(clk), .D(write_data[4]), .DE(_007_), .Q(\mem[7][4] ));
  sky130_fd_sc_hd__edfxtp_1 _493_ (.CLK(clk), .D(write_data[5]), .DE(_007_), .Q(\mem[7][5] ));
  sky130_fd_sc_hd__edfxtp_1 _494_ (.CLK(clk), .D(write_data[6]), .DE(_007_), .Q(\mem[7][6] ));
  sky130_fd_sc_hd__edfxtp_1 _495_ (.CLK(clk), .D(write_data[7]), .DE(_007_), .Q(\mem[7][7] ));
  sky130_fd_sc_hd__edfxtp_1 _496_ (.CLK(clk), .D(write_data[0]), .DE(_008_), .Q(\mem[8][0] ));
  sky130_fd_sc_hd__edfxtp_1 _497_ (.CLK(clk), .D(write_data[1]), .DE(_008_), .Q(\mem[8][1] ));
  sky130_fd_sc_hd__edfxtp_1 _498_ (.CLK(clk), .D(write_data[2]), .DE(_008_), .Q(\mem[8][2] ));
  sky130_fd_sc_hd__edfxtp_1 _499_ (.CLK(clk), .D(write_data[3]), .DE(_008_), .Q(\mem[8][3] ));
  sky130_fd_sc_hd__edfxtp_1 _500_ (.CLK(clk), .D(write_data[4]), .DE(_008_), .Q(\mem[8][4] ));
  sky130_fd_sc_hd__edfxtp_1 _501_ (.CLK(clk), .D(write_data[5]), .DE(_008_), .Q(\mem[8][5] ));
  sky130_fd_sc_hd__edfxtp_1 _502_ (.CLK(clk), .D(write_data[6]), .DE(_008_), .Q(\mem[8][6] ));
  sky130_fd_sc_hd__edfxtp_1 _503_ (.CLK(clk), .D(write_data[7]), .DE(_008_), .Q(\mem[8][7] ));
  sky130_fd_sc_hd__edfxtp_1 _504_ (.CLK(clk), .D(write_data[0]), .DE(_009_), .Q(\mem[9][0] ));
  sky130_fd_sc_hd__edfxtp_1 _505_ (.CLK(clk), .D(write_data[1]), .DE(_009_), .Q(\mem[9][1] ));
  sky130_fd_sc_hd__edfxtp_1 _506_ (.CLK(clk), .D(write_data[2]), .DE(_009_), .Q(\mem[9][2] ));
  sky130_fd_sc_hd__edfxtp_1 _507_ (.CLK(clk), .D(write_data[3]), .DE(_009_), .Q(\mem[9][3] ));
  sky130_fd_sc_hd__edfxtp_1 _508_ (.CLK(clk), .D(write_data[4]), .DE(_009_), .Q(\mem[9][4] ));
  sky130_fd_sc_hd__edfxtp_1 _509_ (.CLK(clk), .D(write_data[5]), .DE(_009_), .Q(\mem[9][5] ));
  sky130_fd_sc_hd__edfxtp_1 _510_ (.CLK(clk), .D(write_data[6]), .DE(_009_), .Q(\mem[9][6] ));
  sky130_fd_sc_hd__edfxtp_1 _511_ (.CLK(clk), .D(write_data[7]), .DE(_009_), .Q(\mem[9][7] ));
  sky130_fd_sc_hd__edfxtp_1 _512_ (.CLK(clk), .D(write_data[0]), .DE(_010_), .Q(\mem[10][0] ));
  sky130_fd_sc_hd__edfxtp_1 _513_ (.CLK(clk), .D(write_data[1]), .DE(_010_), .Q(\mem[10][1] ));
  sky130_fd_sc_hd__edfxtp_1 _514_ (.CLK(clk), .D(write_data[2]), .DE(_010_), .Q(\mem[10][2] ));
  sky130_fd_sc_hd__edfxtp_1 _515_ (.CLK(clk), .D(write_data[3]), .DE(_010_), .Q(\mem[10][3] ));
  sky130_fd_sc_hd__edfxtp_1 _516_ (.CLK(clk), .D(write_data[4]), .DE(_010_), .Q(\mem[10][4] ));
  sky130_fd_sc_hd__edfxtp_1 _517_ (.CLK(clk), .D(write_data[5]), .DE(_010_), .Q(\mem[10][5] ));
  sky130_fd_sc_hd__edfxtp_1 _518_ (.CLK(clk), .D(write_data[6]), .DE(_010_), .Q(\mem[10][6] ));
  sky130_fd_sc_hd__edfxtp_1 _519_ (.CLK(clk), .D(write_data[7]), .DE(_010_), .Q(\mem[10][7] ));
  sky130_fd_sc_hd__edfxtp_1 _520_ (.CLK(clk), .D(write_data[0]), .DE(_011_), .Q(\mem[11][0] ));
  sky130_fd_sc_hd__edfxtp_1 _521_ (.CLK(clk), .D(write_data[1]), .DE(_011_), .Q(\mem[11][1] ));
  sky130_fd_sc_hd__edfxtp_1 _522_ (.CLK(clk), .D(write_data[2]), .DE(_011_), .Q(\mem[11][2] ));
  sky130_fd_sc_hd__edfxtp_1 _523_ (.CLK(clk), .D(write_data[3]), .DE(_011_), .Q(\mem[11][3] ));
  sky130_fd_sc_hd__edfxtp_1 _524_ (.CLK(clk), .D(write_data[4]), .DE(_011_), .Q(\mem[11][4] ));
  sky130_fd_sc_hd__edfxtp_1 _525_ (.CLK(clk), .D(write_data[5]), .DE(_011_), .Q(\mem[11][5] ));
  sky130_fd_sc_hd__edfxtp_1 _526_ (.CLK(clk), .D(write_data[6]), .DE(_011_), .Q(\mem[11][6] ));
  sky130_fd_sc_hd__edfxtp_1 _527_ (.CLK(clk), .D(write_data[7]), .DE(_011_), .Q(\mem[11][7] ));
  sky130_fd_sc_hd__edfxtp_1 _528_ (.CLK(clk), .D(write_data[0]), .DE(_012_), .Q(\mem[12][0] ));
  sky130_fd_sc_hd__edfxtp_1 _529_ (.CLK(clk), .D(write_data[1]), .DE(_012_), .Q(\mem[12][1] ));
  sky130_fd_sc_hd__edfxtp_1 _530_ (.CLK(clk), .D(write_data[2]), .DE(_012_), .Q(\mem[12][2] ));
  sky130_fd_sc_hd__edfxtp_1 _531_ (.CLK(clk), .D(write_data[3]), .DE(_012_), .Q(\mem[12][3] ));
  sky130_fd_sc_hd__edfxtp_1 _532_ (.CLK(clk), .D(write_data[4]), .DE(_012_), .Q(\mem[12][4] ));
  sky130_fd_sc_hd__edfxtp_1 _533_ (.CLK(clk), .D(write_data[5]), .DE(_012_), .Q(\mem[12][5] ));
  sky130_fd_sc_hd__edfxtp_1 _534_ (.CLK(clk), .D(write_data[6]), .DE(_012_), .Q(\mem[12][6] ));
  sky130_fd_sc_hd__edfxtp_1 _535_ (.CLK(clk), .D(write_data[7]), .DE(_012_), .Q(\mem[12][7] ));
  sky130_fd_sc_hd__edfxtp_1 _536_ (.CLK(clk), .D(write_data[0]), .DE(_013_), .Q(\mem[13][0] ));
  sky130_fd_sc_hd__edfxtp_1 _537_ (.CLK(clk), .D(write_data[1]), .DE(_013_), .Q(\mem[13][1] ));
  sky130_fd_sc_hd__edfxtp_1 _538_ (.CLK(clk), .D(write_data[2]), .DE(_013_), .Q(\mem[13][2] ));
  sky130_fd_sc_hd__edfxtp_1 _539_ (.CLK(clk), .D(write_data[3]), .DE(_013_), .Q(\mem[13][3] ));
  sky130_fd_sc_hd__edfxtp_1 _540_ (.CLK(clk), .D(write_data[4]), .DE(_013_), .Q(\mem[13][4] ));
  sky130_fd_sc_hd__edfxtp_1 _541_ (.CLK(clk), .D(write_data[5]), .DE(_013_), .Q(\mem[13][5] ));
  sky130_fd_sc_hd__edfxtp_1 _542_ (.CLK(clk), .D(write_data[6]), .DE(_013_), .Q(\mem[13][6] ));
  sky130_fd_sc_hd__edfxtp_1 _543_ (.CLK(clk), .D(write_data[7]), .DE(_013_), .Q(\mem[13][7] ));
  sky130_fd_sc_hd__edfxtp_1 _544_ (.CLK(clk), .D(write_data[0]), .DE(_014_), .Q(\mem[14][0] ));
  sky130_fd_sc_hd__edfxtp_1 _545_ (.CLK(clk), .D(write_data[1]), .DE(_014_), .Q(\mem[14][1] ));
  sky130_fd_sc_hd__edfxtp_1 _546_ (.CLK(clk), .D(write_data[2]), .DE(_014_), .Q(\mem[14][2] ));
  sky130_fd_sc_hd__edfxtp_1 _547_ (.CLK(clk), .D(write_data[3]), .DE(_014_), .Q(\mem[14][3] ));
  sky130_fd_sc_hd__edfxtp_1 _548_ (.CLK(clk), .D(write_data[4]), .DE(_014_), .Q(\mem[14][4] ));
  sky130_fd_sc_hd__edfxtp_1 _549_ (.CLK(clk), .D(write_data[5]), .DE(_014_), .Q(\mem[14][5] ));
  sky130_fd_sc_hd__edfxtp_1 _550_ (.CLK(clk), .D(write_data[6]), .DE(_014_), .Q(\mem[14][6] ));
  sky130_fd_sc_hd__edfxtp_1 _551_ (.CLK(clk), .D(write_data[7]), .DE(_014_), .Q(\mem[14][7] ));
  sky130_fd_sc_hd__edfxtp_1 _552_ (.CLK(clk), .D(write_data[0]), .DE(_015_), .Q(\mem[15][0] ));
  sky130_fd_sc_hd__edfxtp_1 _553_ (.CLK(clk), .D(write_data[1]), .DE(_015_), .Q(\mem[15][1] ));
  sky130_fd_sc_hd__edfxtp_1 _554_ (.CLK(clk), .D(write_data[2]), .DE(_015_), .Q(\mem[15][2] ));
  sky130_fd_sc_hd__edfxtp_1 _555_ (.CLK(clk), .D(write_data[3]), .DE(_015_), .Q(\mem[15][3] ));
  sky130_fd_sc_hd__edfxtp_1 _556_ (.CLK(clk), .D(write_data[4]), .DE(_015_), .Q(\mem[15][4] ));
  sky130_fd_sc_hd__edfxtp_1 _557_ (.CLK(clk), .D(write_data[5]), .DE(_015_), .Q(\mem[15][5] ));
  sky130_fd_sc_hd__edfxtp_1 _558_ (.CLK(clk), .D(write_data[6]), .DE(_015_), .Q(\mem[15][6] ));
  sky130_fd_sc_hd__edfxtp_1 _559_ (.CLK(clk), .D(write_data[7]), .DE(_015_), .Q(\mem[15][7] ));
endmodule

ConceptWhy does this grid use met1 for the rails and met4 and met5 for the straps?

met1 is the only layer that the tap cells can reach in a rowCell rails are on met1, and thick top layers carry current farThe foundry reserves the upper layers for power wiring onlyStraps on met1 would short neighbouring rows to each other

ConceptWhy does the flow insert tapvpwrvgnd_1 cells?

To fill the gaps that detailed placement leaves between cellsTo give the router a via from met1 up to met4 in every rowTo tie the wells to the rails, which logic cells leave undoneTo add capacitance between the rails that steadies the supply

ConceptWhich global connection is wrong?

add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VGND} -groundadd_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {VPWR} -poweradd_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VNB}add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VPB}

ConceptA core is 100 µm wide. met4 straps start 13.57 µm from its left edge, VSS first, with a VDD strap half a pitch after each VSS strap, at a pitch of 27.14 µm per net. How many straps of each net fit?

4 VSS and 3 VDD7 VSS and 7 VDD3 VSS and 3 VDD4 VSS and 4 VDD

Remember

Global connections join VPWR and VPB to VDD and VGND and VNB to VSS; they come before the grid, and a missing line leaves pins floating that the grid check cannot see.
The SKY130 grid here is met1 followpin rails on the row edges, met4 and met5 straps at about 27 µm per net, and via stacks at same-net crossings; there is no ring.
The VSS and VDD straps of one layer alternate half a pitch apart; same-net straps are one pitch apart, and they need a core wide enough to fit.
Tap cells tie the wells to the rails against latch-up; this library needs them in every row, in a checkerboard.
The grid costs routing: straps take met4 and met5 tracks, and via stacks take met2 and met3.