Source degeneration

Add a source resistor to a common-source stage, derive its gain with the body effect, and measure what the lost gain buys: predictability across corners, linearity and output resistance.

Lesson
E3.4
Time
30 min
Runs on
ngspice
Check
5 questions

A common-source stage biased by a fixed gate voltage sat at 0.90 V in the typical corner. In the other four process corners its output landed anywhere from 0.66 V to 1.12 V, and its gain from 6.51 to 7.88. A copy with a 5 kΩ source resistor, re-biased once, stayed within 0.83-0.97 V and 2.25-2.29.

DC sweepThe fs corner, at the gate voltages chosen in ttTwo stages (W/L = 4/0.5 µm, RD = 20 kΩ), one with RS = 5 kΩ. The x axis shifts both inputs from the gate voltage that centred each one in the typical corner.
  • R_S = 0
  • R_S = 5 kΩ
0.2 V0.4 V0.6 V0.8 V1.0 V1.2 V1.4 V1.6 V1.8 VOutput-100 mV-50 mV050 mV100 mVInput shift from the tt biastt output 0.9 Vtt gate biasR_S = 0: 1.122 VR_S = 5 kΩ: 0.973 V00.5 V1.0 V1.5 V2.0 VOutput-100 mV-50 mV050 mV100 mVInput shift from the tt biastt output 0.9 Vtt gate biasR_S = 0: 1.122 VR_S = 5 kΩ: 0.973 V
Read the plot as a table
Input shift from the tt biasR_S = 0R_S = 5 kΩ
-100 mV1.603 V1.193 V
-50 mV1.406 V1.084 V
0 V1.122 V972.6 mV
50 mV763.8 mV859.4 mV
100 mV381.8 mV745.7 mV

Measured on ngspice 42 with .lib sky130 fs (401 points). In SKY130 fs is the slow-NMOS corner.

The transistor varies from wafer to wafer; the resistors here do not, and degeneration hands the gain to them.

Feedback inside one transistor

A degenerated common-source stageRS sits between the source and ground. The body stays at ground, so the source rises above it.
A degenerated common-source stage+VDD1.8 VRD​20 kΩM1W/L = 4/0.5RS​2 kΩVIN0.938 V + acoutout0.900 Vs0.090 V
  1. The bias

    At VIN = 0.938 V, 45 µA flows. RD drops 0.9 V and RS lifts the source to 0.09 V.

    ID = 45 µA

  2. The input rises

    More gate voltage pushes more current through M1, and the same current through RS.

    ID + id

  3. The source follows

    The extra current raises the source voltage by idRS. That eats part of the input: vgs grows by less than vin. The body effect raises the threshold too, since the source moved above the body.

  4. Less gain, set by a ratio

    The output moves by −idRD, and id is held back by RS. For a strong device the gain tends to −RD/RS.

Read the circuit as text
  • R_D resistor (20 kΩ): pin 1 → VDD, pin 2 → out
  • M1 NMOS transistor (W/L = 4/0.5): gate → n1, drain → out, source → s
  • R_S resistor (2 kΩ): pin 1 → s, pin 2 → 0
  • VIN voltage source (0.938 V + ac): + → n1, − → 0
  • out port: terminal → out
  • out = 0.900 V
  • s = 0.090 V

Node voltages from the lab's operating point (RS = 2 kΩ stage). Body at ground.

Put a resistor RS between the source and ground. When the input rises, the current rises, the source rises with it, and part of the input is spent across RS. The stage feeds its own output current back against its input: negative feedback inside one transistor. The name for it is source degeneration.

Derive the transconductance of the whole stage, Gm = id/vin. With ro ignored, id = gmvgs + gmbvbs, where vgs = vin − idRS and vbs = −idRS (the body is at ground). Solve: Gm = gm/(1 + (gm + gmb)RS). The gain is Av = −GmRD. When (gm + gmb)RS ≫ 1 it tends to −RD/RS.

Three formulas against the run

The lab biases three stages at 0.9 V out, with RS = 0, 2 kΩ and 5 kΩ. For the 2 kΩ stage it prints gm = 399.6 µS, gmb = 81.7 µS and ro = 239.0 kΩ, then evaluates each formula in the run.

GainRS = 2 kΩRS = 5 kΩ
gmRD/(1 + gmRS), no body effect4.4422.663
gmRD/(1 + (gm + gmb)RS)4.0722.361
Full formula with ro3.8892.278
AC analysis3.8742.273
RD/RS, the limit104

Printed by the lab: f_simple, f_body, f_full and a2 for 2 kΩ, the f5_ lines and a5 for 5 kΩ. Without RS the gain is 7.370.

Each correction closes most of the gap left by the one before. The body effect matters because the source now moves: leaving out gmb overstates the 2 kΩ gain by 9 % (4.442 against 4.072). The full formula, Av = −gmroRD/(RD + ro + (1 + (gm + gmb)ro)RS), adds ro. The last 0.4 % is the SKY130 contact resistance in series with the source (E3.1).

The limit RD/RS is far away. A gain of 10 needs (gm + gmb)RS ≫ 1, and here it is only 0.96 at 2 kΩ. Degeneration is strong only when RS is several times 1/(gm + gmb), about 2.1 kΩ for this device.

What the lost gain buys

Predictability. The hook's table, from one run per corner at the gate voltage chosen in tt:

CornerRS = 0: v(out), gainRS = 2 kΩRS = 5 kΩ
tt0.900 V, 7.370.900 V, 3.870.900 V, 2.27
ff0.737 V, 7.880.817 V, 3.960.852 V, 2.29
ss1.049 V, 6.740.981 V, 3.770.948 V, 2.25
sf (fast NMOS)0.656 V, 7.870.775 V, 3.950.827 V, 2.28
fs (slow NMOS)1.122 V, 6.511.022 V, 3.750.973 V, 2.25

Gate held at the tt bias in every corner. In SKY130 the corner named sf has the fast NMOS (E2.7 Corners and temperature).

Without RS the output wanders over 465 mV and the gain over 21 %. With 5 kΩ: 146 mV and 1.8 %. A slower NMOS needs more VGS for the same current; RS supplies part of that automatically, because less current means less drop across RS. The resistors here are ideal and do not change with corner, so the gain follows their ratio.

Linearity. Feedback spends the input on RS instead of on the curved VGS, so the gain changes less as the input moves. The figure sweeps all three stages together around their biases.

DC sweepGain against input shift, three stagesThe slope −dv(out)/dVIN of each stage as both inputs shift from their 0.9 V biases. A flat curve is a linear stage.
  • R_S = 0
  • R_S = 2 kΩ
  • R_S = 5 kΩ
0123456789Gain (slope)-300 mV-200 mV-100 mV0100 mV200 mV300 mVInput shift from the bias0246810Gain (slope)-200 mV0200 mVInput shift from the bias
  1. Input shift from the bias -28.08 mVR_S = 0 = 6.633 · R_S = 2 kΩ = 3.777 · R_S = 5 kΩ = 2.258

    At −28 mV the undegenerated stage has already lost 10 % of its gain. Its gain stays within that band only from −28 to +70 mV.

  2. Input shift from the bias 70.21 mVR_S = 0 = 6.633 · R_S = 2 kΩ = 3.923 · R_S = 5 kΩ = 2.266

    At +70 mV it falls below 90 % on the other side: a window of 98 mV. With 2 kΩ the window is 196 mV.

  3. Input shift from the bias 132.2 mVR_S = 0 = 1.094 · R_S = 2 kΩ = 2.674 · R_S = 5 kΩ = 2.046

    The 5 kΩ stage holds above 90 % of its gain from −197 mV to +132 mV: a window of 329 mV, more than three times wider.

Read the plot as a table
Input shift from the biasR_S = 0R_S = 2 kΩR_S = 5 kΩ
-300 mV0.15481.0341.765
-200 mV1.1582.4442.04
-100 mV4.1753.3882.194
-28.08 mV6.6333.7772.258
0 V7.373.8742.273
70.21 mV6.6333.9232.266
100 mV2.5433.6982.217
132.2 mV1.0942.6742.046
200 mV0.46280.73060.893
300 mV0.22660.28610.3099

Measured on ngspice 42 (601 points, 1 mV apart).

Output resistance. The lab holds a copy of each device's drain at 0.9 V and measures the resistance looking in: 261 kΩ without RS, 473 kΩ with 2 kΩ, 695 kΩ with 5 kΩ. The formula ro(1 + (gm + gmb)RS) + RS gives 471 kΩ for 2 kΩ. A resistor under the source raises the drain's resistance; a transistor in its place does it far better, which is the cascode of E3.7.

The costs: gain, and the headroom IDRS, 0.09 V at 2 kΩ and 0.225 V at 5 kΩ taken from the swing.

Asked in interviews
  1. What does source degeneration do?

    It lowers the gain to −gmRD/(1 + (gm + gmb)RS), toward −RD/RS. In return the gain depends less on the transistor, the stage is more linear, and the output resistance rises to about ro(1 + (gm + gmb)RS).

  2. Derive the effective transconductance.

    id = gm(vin − idRS) − gmbidRS, so Gm = gm/(1 + (gm + gmb)RS). Ignoring ro.

  3. Why does the body effect appear in the formula?

    The source moves with the signal while the body stays at ground, so vbs = −idRS and the threshold rises with the source. gmb adds to gm in the feedback term. A PMOS in its own n-well tied to its source would avoid it.

Try it

Run the netlist. Each stage is biased by its own sweep, the formulas are evaluated with let from the device's own gm, gmb and ro, then two AC runs give the gains and, with the sources switched by alter ... acmag, the drain resistances.

Now change the first line after the title to .lib sky130 ss and run: every stage re-biases, so the gains barely move. Then replace each alter VINx dc=$&vbx line with the tt value printed above (for example alter VIN0 dc=0.8283206) and run ss again: now the undegenerated stage drifts and the 5 kΩ stage does not.

SPICEngspice 42 · simulator service
Edit the netlist, then run it
Expected measurements: vb0 = 8.283206e-01 vb5 = 1.101335e+00 f5_simple = 2.663474e+00 f5_body = 2.361251e+00 f5_full = 2.278463e+00 vb2 = 9.380470e-01 gm_2k = 3.995562e-04 gmb_2k = 8.172943e-05 ro_2k = 2.389756e+05 f_simple = 4.441703e+00 f_body = 4.071762e+00 f_full = 3.889323e+00 a0 = 7.369919e+00 a2 = 3.874272e+00 a5 = 2.273324e+00 rout0 = 2.612980e+05 rout2 = 4.729140e+05 rout5 = 6.946657e+05

Check yourself

Predict the outputA transconductor of gm = 1 S (so 1/gm = 1 Ω) is degenerated by RS = 2 kΩ and drives RD = 20 kΩ, with no body effect and no ro. The run prints the real part of v(out) for 1 V of AC input. Type the line meas prints (format: a = 6.319360e-01).
* g_m = 1 S (1/g_m = 1 ohm), R_S = 2 kohm, R_D = 20 kohm, no body effect, no r_o
V1 in 0 dc 0 ac 1
G1 out s in s 1
RS s 0 2k
RD out 0 20k
.control
ac lin 3 1k 3k
meas ac a FIND vr(out) AT=1k
.endc
.end
ConceptRead the linearity figure. Which stage keeps its gain within 10 % over the widest input range, and about how wide?
ConceptAn NMOS with its body at ground is degenerated by RS. Which formula for its effective transconductance leaves out something this circuit has?
ConceptWith RD = 20 kΩ and RS = 2 kΩ the stage gives 3.87, far below RD/RS = 10. Why?
ConceptAn engineer checks a stage without RS in five corners and finds the gain moving only ±1.5 %. What did the check probably do?

Remember

  • A source resistor feeds the output current back against the input: Gm = gm/(1 + (gm + gmb)RS), with gmb because the source moves above the body.
  • The gain −GmRD tends to −RD/RS only when (gm + gmb)RS ≫ 1; at 2 kΩ here it is 3.87 against a limit of 10.
  • Degeneration trades gain for predictability across corners, a wider linear input range and a higher output resistance ro(1 + (gm + gmb)RS).
  • Test corner sensitivity at a fixed gate voltage; re-biasing in every corner hides it.
  • It costs headroom: IDRS comes out of the swing.