Building the tree
Follow OpenROAD's clock tree synthesis on the placed MAC, read the tree it builds, and weigh buffer size against insertion delay, skew and clock power.
- Lesson
- L5.2
- Time
- 35 min
- Runs on
- OpenROAD
- Check
- 5 questions
The MAC met its 4.9 ns clock after placement, with 0.0639 ns of setup slack on an ideal clock. Then its clock tree was built from the smallest clock buffer only, clkbuf_1. The edge now reached the flops 0.7019 to 0.7473 ns after the clock pin, and the worst path failed setup with -0.0439 ns of slack. The tree alone took 0.1078 ns of margin.
clkbuf_1._809_ → _827_setup check, latest arrival16 cells
- Clock latency
- Cell delay
- Wire delay
- Setup time
- A slow tree
The launch flop sees the edge 0.7472 ns after the clock port.
- The data path
Clock-to-Q (0.5406 ns) and the cells of the multiplier and adder, as in L4.
- An earlier capture
The capture flop sees the edge at 0.7128 ns, earlier than the launch flop.
- Violated
Slack -0.0439 ns.
Read the path as a table
Launch: clk rise edge at 0.0000 ns, clock latency 0.7472 ns. Capture: clk rise edge at 4.9000 ns, latency 0.7128 ns, library setup time −0.0046 ns.
Arrival 5.6521 ns, required 5.6082 ns, slack −0.0439 ns (violated).
| Cell | Arc | Through | Edge | Delay (ns) | Time (ns) | Slew (ns) |
|---|---|---|---|---|---|---|
| 1 | _809_/CLK → _809_/Q | dfrtp_1 | fall | 0.5406 | 1.2879 | 0.0838 |
_809_/Q → _607_/A | wire acc[1] | fall | 0.0002 | 1.2881 | 0.0839 | |
| 2 | _607_/A → _607_/Y | xnor2_1 | rise | 0.2388 | 1.5269 | 0.2165 |
_607_/Y → _619_/A2 | wire _080_ | rise | 0.0001 | 1.5270 | 0.2165 | |
| 3 | _619_/A2 → _619_/Y | o21ai_0 | fall | 0.1857 | 1.7127 | 0.1520 |
_619_/Y → _641_/C | wire _081_ | fall | 0.0002 | 1.7129 | 0.1520 | |
| 4 | _641_/C → _641_/X | maj3_1 | fall | 0.4300 | 2.1429 | 0.1029 |
_641_/X → _663_/C | wire _083_ | fall | 0.0003 | 2.1432 | 0.1029 | |
| 5 | _663_/C → _663_/X | maj3_1 | fall | 0.4108 | 2.5540 | 0.1011 |
_663_/X → _685_/C | wire _085_ | fall | 0.0002 | 2.5543 | 0.1011 | |
| 6 | _685_/C → _685_/X | maj3_1 | fall | 0.4114 | 2.9657 | 0.1020 |
_685_/X → _707_/C | wire _087_ | fall | 0.0002 | 2.9659 | 0.1020 | |
| 7 | _707_/C → _707_/X | maj3_1 | fall | 0.4220 | 3.3879 | 0.1115 |
_707_/X → _727_/A1 | wire _089_ | fall | 0.0003 | 3.3882 | 0.1115 | |
| 8 | _727_/A1 → _727_/Y | a211oi_1 | rise | 0.3022 | 3.6903 | 0.2874 |
_727_/Y → _729_/A3 | wire _093_ | rise | 0.0001 | 3.6905 | 0.2874 | |
| 9 | _729_/A3 → _729_/Y | o31ai_1 | fall | 0.1740 | 3.8645 | 0.1185 |
_729_/Y → _731_/A2 | wire _095_ | fall | 0.0004 | 3.8649 | 0.1185 | |
| 10 | _731_/A2 → _731_/X | o211a_1 | fall | 0.2487 | 4.1135 | 0.0555 |
_731_/X → _734_/A3 | wire _097_ | fall | 0.0002 | 4.1137 | 0.0555 | |
| 11 | _734_/A3 → _734_/Y | o311ai_0 | rise | 0.5547 | 4.6684 | 0.6401 |
_734_/Y → _736_/A3 | wire _100_ | rise | 0.0003 | 4.6687 | 0.6401 | |
| 12 | _736_/A3 → _736_/Y | a31oi_1 | fall | 0.2350 | 4.9036 | 0.1623 |
_736_/Y → _737_/A2 | wire _101_ | fall | 0.0002 | 4.9038 | 0.1623 | |
| 13 | _737_/A2 → _737_/Y | a21oi_1 | rise | 0.3087 | 5.2125 | 0.2733 |
_737_/Y → _740_/A2 | wire _102_ | rise | 0.0002 | 5.2127 | 0.2733 | |
| 14 | _740_/A2 → _740_/Y | a211oi_1 | fall | 0.1914 | 5.4042 | 0.1364 |
_740_/Y → _742_/C | wire _105_ | fall | 0.0002 | 5.4044 | 0.1364 | |
| 15 | _742_/C → _742_/Y | nand3_1 | rise | 0.1309 | 5.5353 | 0.0837 |
_742_/Y → _748_/B | wire _107_ | rise | 0.0001 | 5.5354 | 0.0837 | |
| 16 | _748_/B → _748_/Y | xnor2_1 | rise | 0.1167 | 5.6520 | 0.1180 |
_748_/Y → _827_/D | wire _048_ | rise | 0.0001 | 5.6521 | 0.1180 |
The report
Startpoint: _809_ (rising edge-triggered flip-flop clocked by clk)
Endpoint: _827_ (rising edge-triggered flip-flop clocked by clk)
Path Group: clk
Path Type: max
Fanout Cap Slew Delay Time Description
-------------------------------------------------------------------------------------
0.0000 0.0000 clock clk (rise edge)
0.0000 0.0000 clock source latency
1 0.0233 0.0000 0.0000 0.0000 ^ clk (in)
clk (net)
0.0003 0.0002 0.0002 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_1)
4 0.0235 0.2772 0.2284 0.2286 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_1)
clknet_0_clk (net)
0.2772 0.0005 0.2291 ^ clkbuf_2_1__f_clk/A (sky130_fd_sc_hd__clkbuf_1)
14 0.0525 0.6073 0.5164 0.7455 ^ clkbuf_2_1__f_clk/X (sky130_fd_sc_hd__clkbuf_1)
clknet_2_1__leaf_clk (net)
0.6073 0.0018 0.7472 ^ _809_/CLK (sky130_fd_sc_hd__dfrtp_1)
4 0.0132 0.0838 0.5406 1.2879 v _809_/Q (sky130_fd_sc_hd__dfrtp_1)
acc[1] (net)
0.0839 0.0002 1.2881 v _607_/A (sky130_fd_sc_hd__xnor2_1)
2 0.0080 0.2165 0.2388 1.5269 ^ _607_/Y (sky130_fd_sc_hd__xnor2_1)
_080_ (net)
0.2165 0.0001 1.5270 ^ _619_/A2 (sky130_fd_sc_hd__o21ai_0)
2 0.0106 0.1520 0.1857 1.7127 v _619_/Y (sky130_fd_sc_hd__o21ai_0)
_081_ (net)
0.1520 0.0002 1.7129 v _641_/C (sky130_fd_sc_hd__maj3_1)
2 0.0102 0.1029 0.4300 2.1429 v _641_/X (sky130_fd_sc_hd__maj3_1)
_083_ (net)
0.1029 0.0003 2.1432 v _663_/C (sky130_fd_sc_hd__maj3_1)
2 0.0098 0.1011 0.4108 2.5540 v _663_/X (sky130_fd_sc_hd__maj3_1)
_085_ (net)
0.1011 0.0002 2.5543 v _685_/C (sky130_fd_sc_hd__maj3_1)
2 0.0100 0.1020 0.4114 2.9657 v _685_/X (sky130_fd_sc_hd__maj3_1)
_087_ (net)
0.1020 0.0002 2.9659 v _707_/C (sky130_fd_sc_hd__maj3_1)
3 0.0121 0.1115 0.4220 3.3879 v _707_/X (sky130_fd_sc_hd__maj3_1)
_089_ (net)
0.1115 0.0003 3.3882 v _727_/A1 (sky130_fd_sc_hd__a211oi_1)
2 0.0067 0.2874 0.3022 3.6903 ^ _727_/Y (sky130_fd_sc_hd__a211oi_1)
_093_ (net)
0.2874 0.0001 3.6905 ^ _729_/A3 (sky130_fd_sc_hd__o31ai_1)
3 0.0128 0.1185 0.1740 3.8645 v _729_/Y (sky130_fd_sc_hd__o31ai_1)
_095_ (net)
0.1185 0.0004 3.8649 v _731_/A2 (sky130_fd_sc_hd__o211a_1)
2 0.0065 0.0555 0.2487 4.1135 v _731_/X (sky130_fd_sc_hd__o211a_1)
_097_ (net)
0.0555 0.0002 4.1137 v _734_/A3 (sky130_fd_sc_hd__o311ai_0)
3 0.0112 0.6401 0.5547 4.6684 ^ _734_/Y (sky130_fd_sc_hd__o311ai_0)
_100_ (net)
0.6401 0.0003 4.6687 ^ _736_/A3 (sky130_fd_sc_hd__a31oi_1)
2 0.0094 0.1623 0.2350 4.9036 v _736_/Y (sky130_fd_sc_hd__a31oi_1)
_101_ (net)
0.1623 0.0002 4.9038 v _737_/A2 (sky130_fd_sc_hd__a21oi_1)
3 0.0118 0.2733 0.3087 5.2125 ^ _737_/Y (sky130_fd_sc_hd__a21oi_1)
_102_ (net)
0.2733 0.0002 5.2127 ^ _740_/A2 (sky130_fd_sc_hd__a211oi_1)
4 0.0140 0.1364 0.1914 5.4042 v _740_/Y (sky130_fd_sc_hd__a211oi_1)
_105_ (net)
0.1364 0.0002 5.4044 v _742_/C (sky130_fd_sc_hd__nand3_1)
1 0.0050 0.0837 0.1309 5.5353 ^ _742_/Y (sky130_fd_sc_hd__nand3_1)
_107_ (net)
0.0837 0.0001 5.5354 ^ _748_/B (sky130_fd_sc_hd__xnor2_1)
1 0.0029 0.1180 0.1167 5.6520 ^ _748_/Y (sky130_fd_sc_hd__xnor2_1)
_048_ (net)
0.1180 0.0001 5.6521 ^ _827_/D (sky130_fd_sc_hd__dfrtp_1)
5.6521 data arrival time
4.9000 4.9000 clock clk (rise edge)
0.0000 4.9000 clock source latency
1 0.0233 0.0000 0.0000 4.9000 ^ clk (in)
clk (net)
0.0003 0.0002 4.9002 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_1)
4 0.0235 0.2772 0.2284 5.1286 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_1)
clknet_0_clk (net)
0.2772 0.0005 5.1291 ^ clkbuf_2_2__f_clk/A (sky130_fd_sc_hd__clkbuf_1)
14 0.0481 0.5579 0.4818 5.6108 ^ clkbuf_2_2__f_clk/X (sky130_fd_sc_hd__clkbuf_1)
clknet_2_2__leaf_clk (net)
0.5579 0.0019 5.6128 ^ _827_/CLK (sky130_fd_sc_hd__dfrtp_1)
0.0000 5.6128 clock reconvergence pessimism
-0.0046 5.6082 library setup time
5.6082 data required time
-------------------------------------------------------------------------------------
5.6082 data required time
-5.6521 data arrival time
-------------------------------------------------------------------------------------
-0.0439 slack (VIOLATED)OpenROAD 26Q2 on sky130hd: 4.9 ns clock, placement as in L4, clock_tree_synthesis with -root_buf and -buf_list clkbuf_1, estimated wires.
What clock tree synthesis builds
After placement the clock is one net: the clk port drives the clock pins of all 52 flops. A direct driver would face the full fanout and wire load. Clock tree synthesis (CTS) replaces the net with a tree of clock buffers, whose last level, the leaves, each drive a small group of flops. The flops are the tree's sinks.
OpenROAD's CTS tool, TritonCTS, works in four steps. It groups sinks that sit close together. It builds a topology over the groups that keeps every root-to-leaf distance about equal. It inserts buffers along the branches, picked from buffer-and-wire segments it characterizes first. Finally it balances what is left.
- Split the region
The topology cuts the area of the sinks in two, then each half in two again. Each cut is a level of the H-tree.
- One buffer per quadrant
A leaf buffer sits in each quarter and drives the flops there: 12, 13, 14, 13. The wires from the root to each leaf are about the same length.
- Even out the loads
CTS added 3 dummy loads: clock cells that drive nothing. They make the lightly loaded leaves as slow as the heavy ones.
Read the diagram as text
- clk port: drives the root only
- clkbuf_0_clk: clkbuf_8, centre
- clkbuf_2_3__f_clk: 12 flops + 1 dummy
- clkbuf_2_2__f_clk: 13 flops + 1 dummy
- clkbuf_2_1__f_clk: 14 flops
- clkbuf_2_0__f_clk: 13 flops + 1 dummy
- clk port → clkbuf_0_clk: clk
- clkbuf_0_clk → clkbuf_2_3__f_clk: clock
- clkbuf_0_clk → clkbuf_2_2__f_clk: clock
- clkbuf_0_clk → clkbuf_2_1__f_clk: clock
- clkbuf_0_clk → clkbuf_2_0__f_clk: clock
Names as CTS writes them: clkbuf_<level>_<index>; level 0 is the root.
An H-tree is the textbook shape. Each level splits the region in two and puts the branch point at the centre, so every root-to-leaf path has the same length. Real blocks are not square and their flops are not uniform, so tools build an H-tree only near the root and then cluster the sinks.
The tree on the placed MAC
The layout steps from the legal placement to the tree. CTS added 5 buffers, all clkbuf_8, and 3 dummy loads. Then it legalized them into free sites, as L4 legalized the cells. The insertion delay is 0.3036 to 0.3123 ns: the earliest and the latest flop differ by only 0.0087 ns.
clkbuf_8, buffer list clkbuf_4.- Tap cells
- Logic
- Buffers and inverters
- Flip-flops
- Clock tree
- Clock nets
- I/O pins
- Stage
- Floorplan
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Worst max slack
- 0.7041 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4243 ns
- Stage
- Global placement
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Wirelength (HPWL)
- 4,952 µm
- Worst max slack
- 0.2629 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4496 ns
- Overflow
- 0.0994
- Stage
- Detailed placement
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Wirelength (HPWL)
- 6,041 µm
- Worst max slack
- 0.1639 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4534 ns
- Stage
- Clock tree
- Cell area
- 4,420.5 µm²
- Utilization
- 43.2 %
- Wirelength (HPWL)
- 6,331 µm
- Worst max slack
- 0.1356 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4663 ns
- Clock skew
- 0.0084 ns
- Placed, ideal clock
Every cell is legal. The clock is still one net from the port to every flop, timed as ideal.
- The tree
The root sits near the middle and feeds 4 leaf buffers, one per quadrant. Each leaf drives the flops around it.
Read the layout as text
mac: die 112.02 × 112.02 µm, core 101.66 × 100.64 µm, 37 rows of 2.72 µm, 39 signal pins.
| Stage | Cell area | Utilization | Wirelength (HPWL) | Worst max slack | Total negative max slack | Worst min slack | Clock skew | Overflow | Cells placed |
|---|---|---|---|---|---|---|---|---|---|
| Floorplan | 4,332.9 µm² | 42.4 % | — | 0.7041 ns | 0.0000 ns | 0.4243 ns | — | — | 136 tap cells; I/O pins not placed yet |
| Global placement | 4,332.9 µm² | 42.4 % | 4,952 µm | 0.2629 ns | 0.0000 ns | 0.4496 ns | — | 0.0994 | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops |
| Detailed placement | 4,332.9 µm² | 42.4 % | 6,041 µm | 0.1639 ns | 0.0000 ns | 0.4534 ns | — | — | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops |
| Clock tree | 4,420.5 µm² | 43.2 % | 6,331 µm | 0.1356 ns | 0.0000 ns | 0.4663 ns | 0.0084 ns | — | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops, 8 clock tree |
OpenROAD 26Q2 on sky130hd, stopped after CTS. The strip shows OpenSTA's skew, signed launch − capture.
The skew in the strip is OpenSTA's: launch minus capture for the worst pair, 0.0084 ns. L5.1 showed that sign. Either way the tree is balanced to a few picoseconds.
Look at the hook again. The clkbuf_1 tree had the same shape, but its weak buffers made the edge slow. Insertion delay grew to 0.7473 ns and skew to 0.0451 ns. A slow edge also lengthens every flop's clock-to-Q, as L5.1's table showed.
Clock cells and clock layers
A clock tree uses clock buffers, clkbuf_N in this library, and clock inverters, clkinv_N. Their rise and fall delays are closer to each other than those of ordinary buffers. That keeps the duty cycle, the fraction of the period the clock is high.
| At 0.1 ns input slew, 20 fF load | Rise delay | Fall delay | Difference |
|---|---|---|---|
| clkbuf_4 | 0.1759 ns | 0.1858 ns | 0.0099 ns |
| buf_4 | 0.1492 ns | 0.1772 ns | 0.0280 ns |
Bilinear lookups in the cell_rise and cell_fall tables of the pinned Liberty, as in L2.2.
Each buffer stage moves the rising and the falling edge by different amounts, so the high time changes by the difference. As a hand estimate, ten identical stages at these same slew and load values would accumulate the difference. Ten stages of buf_4 would change it by 0.2805 ns; ten of clkbuf_4 by 0.0991 ns. Here the clock cell is slower. A real cascade changes slew and load at each stage, so multiply-by-ten is not a measured tree.
Clock nets route on met3 and above in this platform (MIN_CLK_ROUTING_LAYER met3). Its wire estimate gives met3 0.166 Ω per µm against 1.206 Ω on met1: 7.3 times less resistance. A long clock wire on met3 has less RC delay and less variation from end to end.
Production flows go further. A non-default rule (NDR) draws clock nets wider and with more spacing, so they have less resistance and couple less noise from neighbours. Shielding runs ground wires beside them. Here -apply_ndr full requests twice the spacing on non-leaf clock nets; it does not double wire width. These labs leave it disabled.
What the tree costs
In this ungated tree, each clock net switches twice per cycle regardless of data activity. So a tree costs power, area and delay, and CTS trades them against skew and slew.
| After CTS | clkbuf_1 tree | Default tree (clkbuf_8) |
|---|---|---|
| Buffers + dummy loads | 5 + 3 | 5 + 3 |
| Clock cell area | 30.0 µm² | 87.6 µm² |
| Insertion delay | 0.7019 – 0.7473 ns | 0.3036 – 0.3123 ns |
| Skew (OpenSTA, worst pair) | 0.0451 ns | 0.0084 ns |
| Clock power | 0.1658 mW (6.5 %) | 0.2567 mW (9.7 %) |
| Setup WNS at 5 ns | 0.0561 ns | 0.1356 ns |
Two flow runs on the same placement. Power from report_power with OpenSTA's default switching activity; the share is of the whole block.
The clkbuf_1 tree as a layout
- Tap cells
- Logic
- Buffers and inverters
- Flip-flops
- Clock tree
- Clock nets
- I/O pins
- Stage
- Floorplan
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Worst max slack
- 0.7041 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4243 ns
- Stage
- Global placement
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Wirelength (HPWL)
- 4,952 µm
- Worst max slack
- 0.2629 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4496 ns
- Overflow
- 0.0994
- Stage
- Detailed placement
- Cell area
- 4,332.9 µm²
- Utilization
- 42.4 %
- Wirelength (HPWL)
- 6,041 µm
- Worst max slack
- 0.1639 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4534 ns
- Stage
- Clock tree
- Cell area
- 4,362.9 µm²
- Utilization
- 42.6 %
- Wirelength (HPWL)
- 6,328 µm
- Worst max slack
- 0.0561 ns
- Total negative max slack
- 0.0000 ns
- Worst min slack
- 0.4822 ns
- Clock skew
- 0.0451 ns
- Clock tree
The same H-tree, built from the weakest clock buffer.
Read the layout as text
mac: die 112.02 × 112.02 µm, core 101.66 × 100.64 µm, 37 rows of 2.72 µm, 39 signal pins.
| Stage | Cell area | Utilization | Wirelength (HPWL) | Worst max slack | Total negative max slack | Worst min slack | Clock skew | Overflow | Cells placed |
|---|---|---|---|---|---|---|---|---|---|
| Floorplan | 4,332.9 µm² | 42.4 % | — | 0.7041 ns | 0.0000 ns | 0.4243 ns | — | — | 136 tap cells; I/O pins not placed yet |
| Global placement | 4,332.9 µm² | 42.4 % | 4,952 µm | 0.2629 ns | 0.0000 ns | 0.4496 ns | — | 0.0994 | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops |
| Detailed placement | 4,332.9 µm² | 42.4 % | 6,041 µm | 0.1639 ns | 0.0000 ns | 0.4534 ns | — | — | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops |
| Clock tree | 4,362.9 µm² | 42.6 % | 6,328 µm | 0.0561 ns | 0.0000 ns | 0.4822 ns | 0.0451 ns | — | 136 tap cells, 6 buffers and inverters, 389 logic, 52 flip-flops, 8 clock tree |
OpenROAD 26Q2, clock_tree_synthesis -root_buf clkbuf_1 -buf_list clkbuf_1.
The default tree cuts the latest arrival from 0.7473 to 0.3123 ns and the skew from 0.0451 to 0.0084 ns. It also burns 1.5 times the clock power, because its big buffers have more internal capacitance to switch. Here the clock network takes 9.7 % of the block's power. In larger designs with many flops it is often a far bigger share.
Smaller clusters and stronger buffers trade wiring, load, area and power against delay and skew. Their effect depends on the placement; compare actual runs instead of assuming a monotonic improvement.
Asked in interviews
Walk me through what CTS does.
It clusters nearby sinks and builds a balanced topology over the clusters, often an H-tree near the root. It inserts clock buffers along the branches, balances the remaining delay differences and legalizes the new cells. Timing then runs with propagated clocks.
Why use clock buffers instead of normal buffers?
Their rise and fall delays are matched, so the duty cycle survives many stages, and they are sized for the large loads of a clock tree. At this operating point, clkbuf_4 is slower than buf_4.
What are the goals of CTS?
Small local skew, bounded insertion delay, clean clock slews within the max transition limit, and the least buffer area and power that achieve them.
Why route clocks on upper metal with an NDR?
Upper layers are thicker, with several times less resistance per micron. Wider wires and extra spacing lower resistance and coupling noise further, at the cost of routing tracks.
Try it
This is the default tree of the layout figure. Run it and open Layout: step to the clock tree and zoom into a quadrant. The numbers strip shows the skew; the stage metrics list the insertion delay (0.3036 to 0.3123 ns) and the clock power (0.2567 mW).
Now lower the utilization to 20 %. The same flops spread over a larger core, so the tree's wires get longer. Predict which way the insertion delay and the clock power move, then run.
Run to draw the timing paths here.
Run the flow to see each stage of the layout here.
clock tree latencyMax 0.3123 clock tree clock skew 0.0084 ns clock tree clockPower 0.2567Read the netlist: mac.v (the bundled design mac8)
/* Generated by Yosys 0.70+290 (git sha1 e8968a4f7, Release, Clang /usr/bin/clang++ 21.1.8) */
module mac(clk, rst_n, en, a, b, acc);
input clk;
wire clk;
input rst_n;
wire rst_n;
input en;
wire en;
input [7:0] a;
wire [7:0] a;
input [7:0] b;
wire [7:0] b;
output [19:0] acc;
wire [19:0] acc;
wire _000_;
wire _001_;
wire _002_;
wire _003_;
wire _004_;
wire _005_;
wire _006_;
wire _007_;
wire _008_;
wire _009_;
wire _010_;
wire _011_;
wire _012_;
wire _013_;
wire _014_;
wire _015_;
wire _016_;
wire _017_;
wire _018_;
wire _019_;
wire _020_;
wire _021_;
wire _022_;
wire _023_;
wire _024_;
wire _025_;
wire _026_;
wire _027_;
wire _028_;
wire _029_;
wire _030_;
wire _031_;
wire _032_;
wire _033_;
wire _034_;
wire _035_;
wire _036_;
wire _037_;
wire _038_;
wire _039_;
wire _040_;
wire _041_;
wire _042_;
wire _043_;
wire _044_;
wire _045_;
wire _046_;
wire _047_;
wire _048_;
wire _049_;
wire _050_;
wire _051_;
wire _052_;
wire _053_;
wire _054_;
wire _055_;
wire _056_;
wire _057_;
wire _058_;
wire _059_;
wire _060_;
wire _061_;
wire _062_;
wire _063_;
wire _064_;
wire _065_;
wire _066_;
wire _067_;
wire _068_;
wire _069_;
wire _070_;
wire _071_;
wire _072_;
wire _073_;
wire _074_;
wire _075_;
wire _076_;
wire _077_;
wire _078_;
wire _079_;
wire _080_;
wire _081_;
wire _082_;
wire _083_;
wire _084_;
wire _085_;
wire _086_;
wire _087_;
wire _088_;
wire _089_;
wire _090_;
wire _091_;
wire _092_;
wire _093_;
wire _094_;
wire _095_;
wire _096_;
wire _097_;
wire _098_;
wire _099_;
wire _100_;
wire _101_;
wire _102_;
wire _103_;
wire _104_;
wire _105_;
wire _106_;
wire _107_;
wire _108_;
wire _109_;
wire _110_;
wire _111_;
wire _112_;
wire _113_;
wire _114_;
wire _115_;
wire _116_;
wire _117_;
wire _118_;
wire _119_;
wire _120_;
wire _121_;
wire _122_;
wire _123_;
wire _124_;
wire _125_;
wire _126_;
wire _127_;
wire _128_;
wire _129_;
wire _130_;
wire _131_;
wire _132_;
wire _133_;
wire _134_;
wire _135_;
wire _136_;
wire _137_;
wire _138_;
wire _139_;
wire _140_;
wire _141_;
wire _142_;
wire _143_;
wire _144_;
wire _145_;
wire _146_;
wire _147_;
wire _148_;
wire _149_;
wire _150_;
wire _151_;
wire _152_;
wire _153_;
wire _154_;
wire _155_;
wire _156_;
wire _157_;
wire _158_;
wire _159_;
wire _160_;
wire _161_;
wire _162_;
wire _163_;
wire _164_;
wire _165_;
wire _166_;
wire _167_;
wire _168_;
wire _169_;
wire _170_;
wire _171_;
wire _172_;
wire _173_;
wire _174_;
wire _175_;
wire _176_;
wire _177_;
wire _178_;
wire _179_;
wire _180_;
wire _181_;
wire _182_;
wire _183_;
wire _184_;
wire _185_;
wire _186_;
wire _187_;
wire _188_;
wire _189_;
wire _190_;
wire _191_;
wire _192_;
wire _193_;
wire _194_;
wire _195_;
wire _196_;
wire _197_;
wire _198_;
wire _199_;
wire _200_;
wire _201_;
wire _202_;
wire _203_;
wire _204_;
wire _205_;
wire _206_;
wire _207_;
wire _208_;
wire _209_;
wire _210_;
wire _211_;
wire _212_;
wire _213_;
wire _214_;
wire _215_;
wire _216_;
wire _217_;
wire _218_;
wire _219_;
wire _220_;
wire _221_;
wire _222_;
wire _223_;
wire _224_;
wire _225_;
wire _226_;
wire _227_;
wire _228_;
wire _229_;
wire _230_;
wire _231_;
wire _232_;
wire _233_;
wire _234_;
wire _235_;
wire _236_;
wire _237_;
wire _238_;
wire _239_;
wire _240_;
wire _241_;
wire _242_;
wire _243_;
wire _244_;
wire _245_;
wire _246_;
wire _247_;
wire _248_;
wire _249_;
wire _250_;
wire _251_;
wire _252_;
wire _253_;
wire _254_;
wire _255_;
wire _256_;
wire _257_;
wire _258_;
wire _259_;
wire _260_;
wire _261_;
wire _262_;
wire _263_;
wire _264_;
wire _265_;
wire _266_;
wire _267_;
wire _268_;
wire _269_;
wire _270_;
wire _271_;
wire _272_;
wire _273_;
wire _274_;
wire _275_;
wire _276_;
wire _277_;
wire _278_;
wire _279_;
wire _280_;
wire _281_;
wire _282_;
wire _283_;
wire _284_;
wire _285_;
wire _286_;
wire _287_;
wire _288_;
wire _289_;
wire _290_;
wire _291_;
wire _292_;
wire _293_;
wire _294_;
wire _295_;
wire _296_;
wire _297_;
wire _298_;
wire _299_;
wire _300_;
wire _301_;
wire _302_;
wire _303_;
wire _304_;
wire _305_;
wire _306_;
wire _307_;
wire _308_;
wire _309_;
wire _310_;
wire _311_;
wire _312_;
wire _313_;
wire _314_;
wire _315_;
wire _316_;
wire _317_;
wire _318_;
wire _319_;
wire _320_;
wire _321_;
wire _322_;
wire _323_;
wire _324_;
wire _325_;
wire _326_;
wire _327_;
wire _328_;
wire _329_;
wire _330_;
wire _331_;
wire _332_;
wire _333_;
wire _334_;
wire _335_;
wire _336_;
wire _337_;
wire _338_;
wire _339_;
wire _340_;
wire _341_;
wire _342_;
wire _343_;
wire _344_;
wire _345_;
wire _346_;
wire _347_;
wire _348_;
wire _349_;
wire _350_;
wire _351_;
wire _352_;
wire _353_;
wire _354_;
wire _355_;
wire _356_;
wire _357_;
wire _358_;
wire _359_;
wire _360_;
wire _361_;
wire _362_;
wire _363_;
wire _364_;
wire _365_;
wire _366_;
wire _367_;
wire _368_;
wire _369_;
wire _370_;
wire _371_;
wire _372_;
wire _373_;
wire _374_;
wire _375_;
wire _376_;
wire _377_;
wire _378_;
wire _379_;
wire _380_;
wire _381_;
wire _382_;
wire _383_;
wire _384_;
wire _385_;
wire _386_;
wire _387_;
wire _388_;
wire _389_;
wire _390_;
wire _391_;
wire _392_;
wire _393_;
wire _394_;
wire \p[0] ;
wire \p[10] ;
wire \p[11] ;
wire \p[12] ;
wire \p[13] ;
wire \p[14] ;
wire \p[15] ;
wire \p[1] ;
wire \p[2] ;
wire \p[3] ;
wire \p[4] ;
wire \p[5] ;
wire \p[6] ;
wire \p[7] ;
wire \p[8] ;
wire \p[9] ;
wire \ra[0] ;
wire \ra[1] ;
wire \ra[2] ;
wire \ra[3] ;
wire \ra[4] ;
wire \ra[5] ;
wire \ra[6] ;
wire \ra[7] ;
wire \rb[0] ;
wire \rb[1] ;
wire \rb[2] ;
wire \rb[3] ;
wire \rb[4] ;
wire \rb[5] ;
wire \rb[6] ;
wire \rb[7] ;
sky130_fd_sc_hd__clkinv_1 _395_ (
.A(en),
.Y(_052_)
);
sky130_fd_sc_hd__clkinv_1 _396_ (
.A(acc[16]),
.Y(_053_)
);
sky130_fd_sc_hd__xnor2_1 _397_ (
.A(acc[12]),
.B(\p[12] ),
.Y(_061_)
);
sky130_fd_sc_hd__xor3_1 _398_ (
.A(_112_),
.B(_145_),
.C(_146_),
.X(_148_)
);
sky130_fd_sc_hd__nand2_1 _399_ (
.A(_144_),
.B(_148_),
.Y(_149_)
);
sky130_fd_sc_hd__nand3_1 _400_ (
.A(\ra[7] ),
.B(\rb[2] ),
.C(_149_),
.Y(_150_)
);
sky130_fd_sc_hd__xnor2_1 _401_ (
.A(_115_),
.B(_116_),
.Y(_151_)
);
sky130_fd_sc_hd__nand2_1 _402_ (
.A(\rb[7] ),
.B(\ra[3] ),
.Y(_152_)
);
sky130_fd_sc_hd__maj3_1 _403_ (
.A(_112_),
.B(_145_),
.C(_146_),
.X(_153_)
);
sky130_fd_sc_hd__nand2_1 _404_ (
.A(\ra[4] ),
.B(\rb[6] ),
.Y(_154_)
);
sky130_fd_sc_hd__xnor2_1 _405_ (
.A(_153_),
.B(_154_),
.Y(_155_)
);
sky130_fd_sc_hd__xnor2_1 _406_ (
.A(_152_),
.B(_155_),
.Y(_156_)
);
sky130_fd_sc_hd__maj3_1 _407_ (
.A(_150_),
.B(_151_),
.C(_156_),
.X(_157_)
);
sky130_fd_sc_hd__clkinv_1 _408_ (
.A(_061_),
.Y(_062_)
);
sky130_fd_sc_hd__xnor2_1 _409_ (
.A(_120_),
.B(_124_),
.Y(_158_)
);
sky130_fd_sc_hd__nor2b_1 _410_ (
.A(_157_),
.B_N(_158_),
.Y(_159_)
);
sky130_fd_sc_hd__maj3_1 _411_ (
.A(_152_),
.B(_153_),
.C(_154_),
.X(_160_)
);
sky130_fd_sc_hd__xnor2_1 _412_ (
.A(_157_),
.B(_158_),
.Y(_161_)
);
sky130_fd_sc_hd__nor2b_1 _413_ (
.A(_160_),
.B_N(_161_),
.Y(_162_)
);
sky130_fd_sc_hd__xor2_1 _414_ (
.A(_135_),
.B(_136_),
.X(_163_)
);
sky130_fd_sc_hd__o21a_1 _415_ (
.A1(_159_),
.A2(_162_),
.B1(_163_),
.X(_164_)
);
sky130_fd_sc_hd__nand2_1 _416_ (
.A(\ra[7] ),
.B(\rb[1] ),
.Y(_165_)
);
sky130_fd_sc_hd__and2_0 _417_ (
.A(\ra[6] ),
.B(\rb[0] ),
.X(_166_)
);
sky130_fd_sc_hd__nand2_1 _418_ (
.A(\ra[7] ),
.B(\rb[0] ),
.Y(_167_)
);
sky130_fd_sc_hd__and2_0 _419_ (
.A(acc[11]),
.B(\p[11] ),
.X(_063_)
);
sky130_fd_sc_hd__nand2_1 _420_ (
.A(\ra[5] ),
.B(\rb[2] ),
.Y(_168_)
);
sky130_fd_sc_hd__maj3_1 _421_ (
.A(_144_),
.B(_167_),
.C(_168_),
.X(_169_)
);
sky130_fd_sc_hd__nand2_1 _422_ (
.A(\ra[6] ),
.B(\rb[2] ),
.Y(_170_)
);
sky130_fd_sc_hd__xnor2_1 _423_ (
.A(_165_),
.B(_170_),
.Y(_171_)
);
sky130_fd_sc_hd__nand2_1 _424_ (
.A(\ra[3] ),
.B(\rb[5] ),
.Y(_172_)
);
sky130_fd_sc_hd__nand2_1 _425_ (
.A(\ra[4] ),
.B(\rb[4] ),
.Y(_173_)
);
sky130_fd_sc_hd__nand2_1 _426_ (
.A(\ra[4] ),
.B(\rb[3] ),
.Y(_174_)
);
sky130_fd_sc_hd__xor3_1 _427_ (
.A(_147_),
.B(_172_),
.C(_173_),
.X(_175_)
);
sky130_fd_sc_hd__maj3_1 _428_ (
.A(_169_),
.B(_171_),
.C(_175_),
.X(_176_)
);
sky130_fd_sc_hd__nand3_1 _429_ (
.A(\ra[7] ),
.B(\rb[2] ),
.C(_144_),
.Y(_177_)
);
sky130_fd_sc_hd__nand2_1 _430_ (
.A(acc[11]),
.B(\p[11] ),
.Y(_064_)
);
sky130_fd_sc_hd__xnor2_1 _431_ (
.A(_148_),
.B(_177_),
.Y(_178_)
);
sky130_fd_sc_hd__nand2_1 _432_ (
.A(\rb[7] ),
.B(\ra[2] ),
.Y(_179_)
);
sky130_fd_sc_hd__maj3_1 _433_ (
.A(_147_),
.B(_172_),
.C(_173_),
.X(_180_)
);
sky130_fd_sc_hd__nand2_1 _434_ (
.A(\ra[3] ),
.B(\rb[6] ),
.Y(_181_)
);
sky130_fd_sc_hd__xnor2_1 _435_ (
.A(_180_),
.B(_181_),
.Y(_182_)
);
sky130_fd_sc_hd__xnor2_1 _436_ (
.A(_179_),
.B(_182_),
.Y(_183_)
);
sky130_fd_sc_hd__xnor2_1 _437_ (
.A(_176_),
.B(_178_),
.Y(_184_)
);
sky130_fd_sc_hd__maj3_1 _438_ (
.A(_176_),
.B(_178_),
.C(_183_),
.X(_185_)
);
sky130_fd_sc_hd__xor3_1 _439_ (
.A(_150_),
.B(_151_),
.C(_156_),
.X(_186_)
);
sky130_fd_sc_hd__maj3_1 _440_ (
.A(_179_),
.B(_180_),
.C(_181_),
.X(_187_)
);
sky130_fd_sc_hd__nor2_1 _441_ (
.A(acc[11]),
.B(\p[11] ),
.Y(_065_)
);
sky130_fd_sc_hd__xor2_1 _442_ (
.A(_185_),
.B(_186_),
.X(_188_)
);
sky130_fd_sc_hd__maj3_1 _443_ (
.A(_185_),
.B(_186_),
.C(_187_),
.X(_189_)
);
sky130_fd_sc_hd__xor2_1 _444_ (
.A(_160_),
.B(_161_),
.X(_190_)
);
sky130_fd_sc_hd__nor2_1 _445_ (
.A(_189_),
.B(_190_),
.Y(_191_)
);
sky130_fd_sc_hd__nand2_1 _446_ (
.A(\ra[5] ),
.B(\rb[0] ),
.Y(_192_)
);
sky130_fd_sc_hd__and2_0 _447_ (
.A(\ra[5] ),
.B(\rb[1] ),
.X(_193_)
);
sky130_fd_sc_hd__and2_0 _448_ (
.A(\ra[4] ),
.B(\rb[2] ),
.X(_194_)
);
sky130_fd_sc_hd__maj3_1 _449_ (
.A(_166_),
.B(_193_),
.C(_194_),
.X(_195_)
);
sky130_fd_sc_hd__xnor3_1 _450_ (
.A(_144_),
.B(_167_),
.C(_168_),
.X(_196_)
);
sky130_fd_sc_hd__nand2_1 _451_ (
.A(\ra[2] ),
.B(\rb[5] ),
.Y(_197_)
);
sky130_fd_sc_hd__clkinv_1 _452_ (
.A(_065_),
.Y(_066_)
);
sky130_fd_sc_hd__nand2_1 _453_ (
.A(\ra[3] ),
.B(\rb[4] ),
.Y(_198_)
);
sky130_fd_sc_hd__nand2_1 _454_ (
.A(\ra[3] ),
.B(\rb[3] ),
.Y(_199_)
);
sky130_fd_sc_hd__xnor3_1 _455_ (
.A(_174_),
.B(_197_),
.C(_198_),
.X(_200_)
);
sky130_fd_sc_hd__maj3_1 _456_ (
.A(_195_),
.B(_196_),
.C(_200_),
.X(_201_)
);
sky130_fd_sc_hd__xnor3_1 _457_ (
.A(_169_),
.B(_171_),
.C(_175_),
.X(_202_)
);
sky130_fd_sc_hd__nand2_1 _458_ (
.A(\rb[7] ),
.B(\ra[1] ),
.Y(_203_)
);
sky130_fd_sc_hd__maj3_1 _459_ (
.A(_174_),
.B(_197_),
.C(_198_),
.X(_204_)
);
sky130_fd_sc_hd__nand2_1 _460_ (
.A(\ra[2] ),
.B(\rb[6] ),
.Y(_205_)
);
sky130_fd_sc_hd__xor2_1 _461_ (
.A(_204_),
.B(_205_),
.X(_206_)
);
sky130_fd_sc_hd__xnor2_1 _462_ (
.A(_203_),
.B(_206_),
.Y(_207_)
);
sky130_fd_sc_hd__and2_0 _463_ (
.A(acc[10]),
.B(\p[10] ),
.X(_067_)
);
sky130_fd_sc_hd__xor2_1 _464_ (
.A(_201_),
.B(_202_),
.X(_208_)
);
sky130_fd_sc_hd__maj3_1 _465_ (
.A(_201_),
.B(_202_),
.C(_207_),
.X(_209_)
);
sky130_fd_sc_hd__xnor2_1 _466_ (
.A(_183_),
.B(_184_),
.Y(_210_)
);
sky130_fd_sc_hd__nand2b_1 _467_ (
.A_N(_210_),
.B(_209_),
.Y(_211_)
);
sky130_fd_sc_hd__maj3_1 _468_ (
.A(_203_),
.B(_204_),
.C(_205_),
.X(_212_)
);
sky130_fd_sc_hd__xnor2_1 _469_ (
.A(_209_),
.B(_210_),
.Y(_213_)
);
sky130_fd_sc_hd__nand2b_1 _470_ (
.A_N(_212_),
.B(_213_),
.Y(_214_)
);
sky130_fd_sc_hd__and2_0 _471_ (
.A(_211_),
.B(_214_),
.X(_215_)
);
sky130_fd_sc_hd__xor2_1 _472_ (
.A(_187_),
.B(_188_),
.X(_216_)
);
sky130_fd_sc_hd__nor2_1 _473_ (
.A(_215_),
.B(_216_),
.Y(_217_)
);
sky130_fd_sc_hd__nor2_1 _474_ (
.A(acc[10]),
.B(\p[10] ),
.Y(_068_)
);
sky130_fd_sc_hd__nand2_1 _475_ (
.A(\ra[4] ),
.B(\rb[1] ),
.Y(_218_)
);
sky130_fd_sc_hd__and2_0 _476_ (
.A(\ra[4] ),
.B(\rb[0] ),
.X(_219_)
);
sky130_fd_sc_hd__nand2_1 _477_ (
.A(\ra[3] ),
.B(\rb[2] ),
.Y(_220_)
);
sky130_fd_sc_hd__maj3_1 _478_ (
.A(_192_),
.B(_218_),
.C(_220_),
.X(_221_)
);
sky130_fd_sc_hd__xnor3_1 _479_ (
.A(_166_),
.B(_193_),
.C(_194_),
.X(_222_)
);
sky130_fd_sc_hd__nand2_1 _480_ (
.A(\ra[1] ),
.B(\rb[5] ),
.Y(_223_)
);
sky130_fd_sc_hd__nand2_1 _481_ (
.A(\ra[2] ),
.B(\rb[4] ),
.Y(_224_)
);
sky130_fd_sc_hd__nand2_1 _482_ (
.A(\ra[2] ),
.B(\rb[3] ),
.Y(_225_)
);
sky130_fd_sc_hd__xor3_1 _483_ (
.A(_199_),
.B(_223_),
.C(_224_),
.X(_226_)
);
sky130_fd_sc_hd__maj3_1 _484_ (
.A(_221_),
.B(_222_),
.C(_226_),
.X(_227_)
);
sky130_fd_sc_hd__nor2_1 _485_ (
.A(_067_),
.B(_068_),
.Y(_069_)
);
sky130_fd_sc_hd__xnor3_1 _486_ (
.A(_195_),
.B(_196_),
.C(_200_),
.X(_228_)
);
sky130_fd_sc_hd__nand2_1 _487_ (
.A(\rb[7] ),
.B(\ra[0] ),
.Y(_229_)
);
sky130_fd_sc_hd__maj3_1 _488_ (
.A(_199_),
.B(_223_),
.C(_224_),
.X(_230_)
);
sky130_fd_sc_hd__nand2_1 _489_ (
.A(\ra[1] ),
.B(\rb[6] ),
.Y(_231_)
);
sky130_fd_sc_hd__xor3_1 _490_ (
.A(_229_),
.B(_230_),
.C(_231_),
.X(_232_)
);
sky130_fd_sc_hd__xnor2_1 _491_ (
.A(_227_),
.B(_228_),
.Y(_233_)
);
sky130_fd_sc_hd__maj3_1 _492_ (
.A(_227_),
.B(_228_),
.C(_232_),
.X(_234_)
);
sky130_fd_sc_hd__xnor2_1 _493_ (
.A(_207_),
.B(_208_),
.Y(_235_)
);
sky130_fd_sc_hd__nor2_1 _494_ (
.A(_234_),
.B(_235_),
.Y(_236_)
);
sky130_fd_sc_hd__maj3_1 _495_ (
.A(_229_),
.B(_230_),
.C(_231_),
.X(_237_)
);
sky130_fd_sc_hd__and2_0 _496_ (
.A(acc[9]),
.B(\p[9] ),
.X(_070_)
);
sky130_fd_sc_hd__xor3_1 _497_ (
.A(_207_),
.B(_208_),
.C(_234_),
.X(_238_)
);
sky130_fd_sc_hd__nor2_1 _498_ (
.A(_237_),
.B(_238_),
.Y(_239_)
);
sky130_fd_sc_hd__nor2_1 _499_ (
.A(_236_),
.B(_239_),
.Y(_240_)
);
sky130_fd_sc_hd__xnor2_1 _500_ (
.A(_212_),
.B(_213_),
.Y(_241_)
);
sky130_fd_sc_hd__o21ai_0 _501_ (
.A1(_236_),
.A2(_239_),
.B1(_241_),
.Y(_242_)
);
sky130_fd_sc_hd__and2_0 _502_ (
.A(\ra[3] ),
.B(\rb[1] ),
.X(_243_)
);
sky130_fd_sc_hd__nand2_1 _503_ (
.A(\ra[3] ),
.B(\rb[0] ),
.Y(_244_)
);
sky130_fd_sc_hd__and2_0 _504_ (
.A(\ra[2] ),
.B(\rb[2] ),
.X(_245_)
);
sky130_fd_sc_hd__maj3_1 _505_ (
.A(_219_),
.B(_243_),
.C(_245_),
.X(_246_)
);
sky130_fd_sc_hd__xnor3_1 _506_ (
.A(_192_),
.B(_218_),
.C(_220_),
.X(_247_)
);
sky130_fd_sc_hd__mux2_1 _507_ (
.A0(\ra[7] ),
.A1(a[7]),
.S(en),
.X(_051_)
);
sky130_fd_sc_hd__or2_0 _508_ (
.A(acc[9]),
.B(\p[9] ),
.X(_071_)
);
sky130_fd_sc_hd__nand2_1 _509_ (
.A(\ra[0] ),
.B(\rb[5] ),
.Y(_248_)
);
sky130_fd_sc_hd__nand2_1 _510_ (
.A(\ra[1] ),
.B(\rb[4] ),
.Y(_249_)
);
sky130_fd_sc_hd__nand2_1 _511_ (
.A(\ra[1] ),
.B(\rb[3] ),
.Y(_250_)
);
sky130_fd_sc_hd__xnor3_1 _512_ (
.A(_225_),
.B(_248_),
.C(_249_),
.X(_251_)
);
sky130_fd_sc_hd__maj3_1 _513_ (
.A(_246_),
.B(_247_),
.C(_251_),
.X(_252_)
);
sky130_fd_sc_hd__xnor3_1 _514_ (
.A(_221_),
.B(_222_),
.C(_226_),
.X(_253_)
);
sky130_fd_sc_hd__maj3_1 _515_ (
.A(_225_),
.B(_248_),
.C(_249_),
.X(_254_)
);
sky130_fd_sc_hd__nand2_1 _516_ (
.A(\ra[0] ),
.B(\rb[6] ),
.Y(_255_)
);
sky130_fd_sc_hd__nor2_1 _517_ (
.A(_254_),
.B(_255_),
.Y(_256_)
);
sky130_fd_sc_hd__xor2_1 _518_ (
.A(_254_),
.B(_255_),
.X(_257_)
);
sky130_fd_sc_hd__nand2_1 _519_ (
.A(acc[8]),
.B(\p[8] ),
.Y(_072_)
);
sky130_fd_sc_hd__xnor2_1 _520_ (
.A(_252_),
.B(_253_),
.Y(_258_)
);
sky130_fd_sc_hd__maj3_1 _521_ (
.A(_252_),
.B(_253_),
.C(_257_),
.X(_259_)
);
sky130_fd_sc_hd__xor2_1 _522_ (
.A(_232_),
.B(_233_),
.X(_260_)
);
sky130_fd_sc_hd__xor2_1 _523_ (
.A(_259_),
.B(_260_),
.X(_261_)
);
sky130_fd_sc_hd__maj3_1 _524_ (
.A(_256_),
.B(_259_),
.C(_260_),
.X(_262_)
);
sky130_fd_sc_hd__xor2_1 _525_ (
.A(_237_),
.B(_238_),
.X(_263_)
);
sky130_fd_sc_hd__nand2_1 _526_ (
.A(_262_),
.B(_263_),
.Y(_264_)
);
sky130_fd_sc_hd__xnor2_1 _527_ (
.A(_262_),
.B(_263_),
.Y(_265_)
);
sky130_fd_sc_hd__xnor2_1 _528_ (
.A(_256_),
.B(_261_),
.Y(_266_)
);
sky130_fd_sc_hd__nand2_1 _529_ (
.A(\ra[2] ),
.B(\rb[1] ),
.Y(_267_)
);
sky130_fd_sc_hd__nor2_1 _530_ (
.A(acc[8]),
.B(\p[8] ),
.Y(_073_)
);
sky130_fd_sc_hd__nand2_1 _531_ (
.A(\ra[2] ),
.B(\rb[0] ),
.Y(_268_)
);
sky130_fd_sc_hd__nand2_1 _532_ (
.A(\ra[1] ),
.B(\rb[2] ),
.Y(_269_)
);
sky130_fd_sc_hd__xnor2_1 _533_ (
.A(_244_),
.B(_267_),
.Y(_270_)
);
sky130_fd_sc_hd__maj3_1 _534_ (
.A(_244_),
.B(_267_),
.C(_269_),
.X(_271_)
);
sky130_fd_sc_hd__xnor3_1 _535_ (
.A(_219_),
.B(_243_),
.C(_245_),
.X(_272_)
);
sky130_fd_sc_hd__nand2_1 _536_ (
.A(\ra[0] ),
.B(\rb[4] ),
.Y(_273_)
);
sky130_fd_sc_hd__nand2_1 _537_ (
.A(\ra[0] ),
.B(\rb[3] ),
.Y(_274_)
);
sky130_fd_sc_hd__nor2_1 _538_ (
.A(_250_),
.B(_273_),
.Y(_275_)
);
sky130_fd_sc_hd__xnor2_1 _539_ (
.A(_250_),
.B(_273_),
.Y(_276_)
);
sky130_fd_sc_hd__maj3_1 _540_ (
.A(_271_),
.B(_272_),
.C(_276_),
.X(_277_)
);
sky130_fd_sc_hd__xor2_1 _541_ (
.A(acc[8]),
.B(\p[8] ),
.X(_074_)
);
sky130_fd_sc_hd__clkinv_1 _542_ (
.A(_277_),
.Y(_278_)
);
sky130_fd_sc_hd__xor3_1 _543_ (
.A(_246_),
.B(_247_),
.C(_251_),
.X(_279_)
);
sky130_fd_sc_hd__xor2_1 _544_ (
.A(_277_),
.B(_279_),
.X(_280_)
);
sky130_fd_sc_hd__maj3_1 _545_ (
.A(_275_),
.B(_278_),
.C(_279_),
.X(_281_)
);
sky130_fd_sc_hd__xnor2_1 _546_ (
.A(_257_),
.B(_258_),
.Y(_282_)
);
sky130_fd_sc_hd__nand2_1 _547_ (
.A(_281_),
.B(_282_),
.Y(_283_)
);
sky130_fd_sc_hd__xnor2_1 _548_ (
.A(_281_),
.B(_282_),
.Y(_284_)
);
sky130_fd_sc_hd__nand2_1 _549_ (
.A(\ra[1] ),
.B(\rb[1] ),
.Y(_285_)
);
sky130_fd_sc_hd__nand2_1 _550_ (
.A(\ra[0] ),
.B(\rb[2] ),
.Y(_286_)
);
sky130_fd_sc_hd__xor2_1 _551_ (
.A(_268_),
.B(_285_),
.X(_287_)
);
sky130_fd_sc_hd__and2_0 _552_ (
.A(acc[7]),
.B(\p[7] ),
.X(_075_)
);
sky130_fd_sc_hd__maj3_1 _553_ (
.A(_268_),
.B(_285_),
.C(_286_),
.X(_288_)
);
sky130_fd_sc_hd__xnor2_1 _554_ (
.A(_269_),
.B(_270_),
.Y(_289_)
);
sky130_fd_sc_hd__maj3_1 _555_ (
.A(_274_),
.B(_288_),
.C(_289_),
.X(_290_)
);
sky130_fd_sc_hd__xnor3_1 _556_ (
.A(_271_),
.B(_272_),
.C(_276_),
.X(_291_)
);
sky130_fd_sc_hd__nand2b_1 _557_ (
.A_N(_290_),
.B(_291_),
.Y(_292_)
);
sky130_fd_sc_hd__xnor2_1 _558_ (
.A(_275_),
.B(_280_),
.Y(_293_)
);
sky130_fd_sc_hd__nand2b_1 _559_ (
.A_N(_292_),
.B(_293_),
.Y(_294_)
);
sky130_fd_sc_hd__nand2_1 _560_ (
.A(\ra[0] ),
.B(\rb[0] ),
.Y(_295_)
);
sky130_fd_sc_hd__nand4_1 _561_ (
.A(\ra[0] ),
.B(\ra[1] ),
.C(\rb[0] ),
.D(\rb[1] ),
.Y(_296_)
);
sky130_fd_sc_hd__xnor2_1 _562_ (
.A(_286_),
.B(_287_),
.Y(_297_)
);
sky130_fd_sc_hd__nor2_1 _563_ (
.A(acc[7]),
.B(\p[7] ),
.Y(_076_)
);
sky130_fd_sc_hd__nand2b_1 _564_ (
.A_N(_296_),
.B(_297_),
.Y(_298_)
);
sky130_fd_sc_hd__xor3_1 _565_ (
.A(_274_),
.B(_288_),
.C(_289_),
.X(_299_)
);
sky130_fd_sc_hd__nor2_1 _566_ (
.A(_298_),
.B(_299_),
.Y(_300_)
);
sky130_fd_sc_hd__nand2b_1 _567_ (
.A_N(_291_),
.B(_290_),
.Y(_301_)
);
sky130_fd_sc_hd__and2_0 _568_ (
.A(_292_),
.B(_301_),
.X(_302_)
);
sky130_fd_sc_hd__nand2_1 _569_ (
.A(_300_),
.B(_302_),
.Y(_303_)
);
sky130_fd_sc_hd__xor2_1 _570_ (
.A(_292_),
.B(_293_),
.X(_304_)
);
sky130_fd_sc_hd__nand4_1 _571_ (
.A(_292_),
.B(_293_),
.C(_300_),
.D(_301_),
.Y(_305_)
);
sky130_fd_sc_hd__a21o_1 _572_ (
.A1(_294_),
.A2(_305_),
.B1(_284_),
.X(_306_)
);
sky130_fd_sc_hd__a21oi_1 _573_ (
.A1(_283_),
.A2(_306_),
.B1(_266_),
.Y(_307_)
);
sky130_fd_sc_hd__and2_0 _574_ (
.A(acc[6]),
.B(\p[6] ),
.X(_077_)
);
sky130_fd_sc_hd__a211o_1 _575_ (
.A1(_283_),
.A2(_306_),
.B1(_265_),
.C1(_266_),
.X(_308_)
);
sky130_fd_sc_hd__xor2_1 _576_ (
.A(_240_),
.B(_241_),
.X(_309_)
);
sky130_fd_sc_hd__a21o_1 _577_ (
.A1(_264_),
.A2(_308_),
.B1(_309_),
.X(_310_)
);
sky130_fd_sc_hd__nand2_1 _578_ (
.A(_242_),
.B(_310_),
.Y(_311_)
);
sky130_fd_sc_hd__xor2_1 _579_ (
.A(_215_),
.B(_216_),
.X(_312_)
);
sky130_fd_sc_hd__a21boi_0 _580_ (
.A1(_242_),
.A2(_310_),
.B1_N(_312_),
.Y(_313_)
);
sky130_fd_sc_hd__xor2_1 _581_ (
.A(_189_),
.B(_190_),
.X(_314_)
);
sky130_fd_sc_hd__o21a_1 _582_ (
.A1(_217_),
.A2(_313_),
.B1(_314_),
.X(_315_)
);
sky130_fd_sc_hd__nor3_1 _583_ (
.A(_159_),
.B(_162_),
.C(_163_),
.Y(_316_)
);
sky130_fd_sc_hd__nor2_1 _584_ (
.A(_164_),
.B(_316_),
.Y(_317_)
);
sky130_fd_sc_hd__nand2_1 _585_ (
.A(acc[1]),
.B(\p[1] ),
.Y(_078_)
);
sky130_fd_sc_hd__o21a_1 _586_ (
.A1(_191_),
.A2(_315_),
.B1(_317_),
.X(_318_)
);
sky130_fd_sc_hd__nand2_1 _587_ (
.A(_137_),
.B(_142_),
.Y(_319_)
);
sky130_fd_sc_hd__nand2_1 _588_ (
.A(_143_),
.B(_319_),
.Y(_320_)
);
sky130_fd_sc_hd__o21bai_1 _589_ (
.A1(_164_),
.A2(_318_),
.B1_N(_320_),
.Y(_321_)
);
sky130_fd_sc_hd__nand3_1 _590_ (
.A(\ra[7] ),
.B(\rb[7] ),
.C(_127_),
.Y(_322_)
);
sky130_fd_sc_hd__maj3_1 _591_ (
.A(_133_),
.B(_138_),
.C(_140_),
.X(_323_)
);
sky130_fd_sc_hd__xor2_1 _592_ (
.A(_322_),
.B(_323_),
.X(_324_)
);
sky130_fd_sc_hd__a21o_1 _593_ (
.A1(_143_),
.A2(_321_),
.B1(_324_),
.X(_325_)
);
sky130_fd_sc_hd__o211ai_1 _594_ (
.A1(_128_),
.A2(_323_),
.B1(\ra[7] ),
.C1(\rb[7] ),
.Y(_326_)
);
sky130_fd_sc_hd__a31oi_1 _595_ (
.A1(en),
.A2(_325_),
.A3(_326_),
.B1(_110_),
.Y(_047_)
);
sky130_fd_sc_hd__nand2_1 _596_ (
.A(acc[0]),
.B(\p[0] ),
.Y(_079_)
);
sky130_fd_sc_hd__mux2_1 _597_ (
.A0(\rb[7] ),
.A1(b[7]),
.S(en),
.X(_046_)
);
sky130_fd_sc_hd__mux2_1 _598_ (
.A0(\ra[0] ),
.A1(a[0]),
.S(en),
.X(_045_)
);
sky130_fd_sc_hd__mux2_1 _599_ (
.A0(\ra[1] ),
.A1(a[1]),
.S(en),
.X(_044_)
);
sky130_fd_sc_hd__mux2_1 _600_ (
.A0(\ra[2] ),
.A1(a[2]),
.S(en),
.X(_043_)
);
sky130_fd_sc_hd__mux2_1 _601_ (
.A0(\ra[3] ),
.A1(a[3]),
.S(en),
.X(_042_)
);
sky130_fd_sc_hd__mux2_1 _602_ (
.A0(\ra[4] ),
.A1(a[4]),
.S(en),
.X(_041_)
);
sky130_fd_sc_hd__mux2_1 _603_ (
.A0(\ra[5] ),
.A1(a[5]),
.S(en),
.X(_040_)
);
sky130_fd_sc_hd__mux2_1 _604_ (
.A0(\ra[6] ),
.A1(a[6]),
.S(en),
.X(_039_)
);
sky130_fd_sc_hd__xnor2_1 _605_ (
.A(_062_),
.B(_099_),
.Y(_327_)
);
sky130_fd_sc_hd__nor2_1 _606_ (
.A(en),
.B(acc[12]),
.Y(_328_)
);
sky130_fd_sc_hd__xnor2_1 _607_ (
.A(acc[1]),
.B(\p[1] ),
.Y(_080_)
);
sky130_fd_sc_hd__a21oi_1 _608_ (
.A1(en),
.A2(_327_),
.B1(_328_),
.Y(_038_)
);
sky130_fd_sc_hd__xnor2_1 _609_ (
.A(_069_),
.B(_096_),
.Y(_329_)
);
sky130_fd_sc_hd__nor2_1 _610_ (
.A(en),
.B(acc[10]),
.Y(_330_)
);
sky130_fd_sc_hd__a21oi_1 _611_ (
.A1(en),
.A2(_329_),
.B1(_330_),
.Y(_037_)
);
sky130_fd_sc_hd__xnor2_1 _612_ (
.A(_074_),
.B(_094_),
.Y(_331_)
);
sky130_fd_sc_hd__nor2_1 _613_ (
.A(en),
.B(acc[8]),
.Y(_332_)
);
sky130_fd_sc_hd__a21oi_1 _614_ (
.A1(en),
.A2(_331_),
.B1(_332_),
.Y(_036_)
);
sky130_fd_sc_hd__xnor2_1 _615_ (
.A(\p[15] ),
.B(acc[15]),
.Y(_333_)
);
sky130_fd_sc_hd__xnor2_1 _616_ (
.A(_102_),
.B(_333_),
.Y(_334_)
);
sky130_fd_sc_hd__nor2_1 _617_ (
.A(en),
.B(acc[15]),
.Y(_335_)
);
sky130_fd_sc_hd__nand2_1 _618_ (
.A(\p[15] ),
.B(acc[15]),
.Y(_054_)
);
sky130_fd_sc_hd__o21ai_0 _619_ (
.A1(_079_),
.A2(_080_),
.B1(_078_),
.Y(_081_)
);
sky130_fd_sc_hd__a21oi_1 _620_ (
.A1(en),
.A2(_334_),
.B1(_335_),
.Y(_035_)
);
sky130_fd_sc_hd__xnor2_1 _621_ (
.A(_089_),
.B(_091_),
.Y(_336_)
);
sky130_fd_sc_hd__nor2_1 _622_ (
.A(en),
.B(acc[6]),
.Y(_337_)
);
sky130_fd_sc_hd__a21oi_1 _623_ (
.A1(en),
.A2(_336_),
.B1(_337_),
.Y(_034_)
);
sky130_fd_sc_hd__nor2_1 _624_ (
.A(en),
.B(acc[11]),
.Y(_338_)
);
sky130_fd_sc_hd__nand2_1 _625_ (
.A(_064_),
.B(_066_),
.Y(_339_)
);
sky130_fd_sc_hd__xnor2_1 _626_ (
.A(_098_),
.B(_339_),
.Y(_340_)
);
sky130_fd_sc_hd__a21oi_1 _627_ (
.A1(en),
.A2(_340_),
.B1(_338_),
.Y(_033_)
);
sky130_fd_sc_hd__nor2b_1 _628_ (
.A(en),
.B_N(\p[14] ),
.Y(_341_)
);
sky130_fd_sc_hd__nand3_1 _629_ (
.A(_143_),
.B(_321_),
.C(_324_),
.Y(_342_)
);
sky130_fd_sc_hd__xor2_1 _630_ (
.A(acc[2]),
.B(\p[2] ),
.X(_082_)
);
sky130_fd_sc_hd__a31o_1 _631_ (
.A1(en),
.A2(_325_),
.A3(_342_),
.B1(_341_),
.X(_032_)
);
sky130_fd_sc_hd__xnor2_1 _632_ (
.A(_057_),
.B(_101_),
.Y(_343_)
);
sky130_fd_sc_hd__nor2_1 _633_ (
.A(en),
.B(acc[14]),
.Y(_344_)
);
sky130_fd_sc_hd__a21oi_1 _634_ (
.A1(en),
.A2(_343_),
.B1(_344_),
.Y(_031_)
);
sky130_fd_sc_hd__nor2_1 _635_ (
.A(acc[16]),
.B(_104_),
.Y(_345_)
);
sky130_fd_sc_hd__nor2_1 _636_ (
.A(_105_),
.B(_345_),
.Y(_030_)
);
sky130_fd_sc_hd__xnor2_1 _637_ (
.A(acc[13]),
.B(\p[13] ),
.Y(_346_)
);
sky130_fd_sc_hd__nand3_1 _638_ (
.A(_060_),
.B(_100_),
.C(_346_),
.Y(_347_)
);
sky130_fd_sc_hd__a21oi_1 _639_ (
.A1(_060_),
.A2(_100_),
.B1(_346_),
.Y(_348_)
);
sky130_fd_sc_hd__nor3b_1 _640_ (
.A(_348_),
.B(_052_),
.C_N(_347_),
.Y(_349_)
);
sky130_fd_sc_hd__maj3_1 _641_ (
.A(acc[2]),
.B(\p[2] ),
.C(_081_),
.X(_083_)
);
sky130_fd_sc_hd__a21o_1 _642_ (
.A1(_052_),
.A2(acc[13]),
.B1(_349_),
.X(_029_)
);
sky130_fd_sc_hd__xnor2_1 _643_ (
.A(_079_),
.B(_080_),
.Y(_350_)
);
sky130_fd_sc_hd__nor2_1 _644_ (
.A(en),
.B(acc[1]),
.Y(_351_)
);
sky130_fd_sc_hd__a21oi_1 _645_ (
.A1(en),
.A2(_350_),
.B1(_351_),
.Y(_028_)
);
sky130_fd_sc_hd__nor3b_1 _646_ (
.A(_164_),
.B(_318_),
.C_N(_320_),
.Y(_352_)
);
sky130_fd_sc_hd__nand2_1 _647_ (
.A(en),
.B(_321_),
.Y(_353_)
);
sky130_fd_sc_hd__o2bb2ai_1 _648_ (
.A1_N(_052_),
.A2_N(\p[13] ),
.B1(_352_),
.B2(_353_),
.Y(_027_)
);
sky130_fd_sc_hd__xnor2_1 _649_ (
.A(_083_),
.B(_084_),
.Y(_354_)
);
sky130_fd_sc_hd__nor2_1 _650_ (
.A(en),
.B(acc[3]),
.Y(_355_)
);
sky130_fd_sc_hd__a21oi_1 _651_ (
.A1(en),
.A2(_354_),
.B1(_355_),
.Y(_026_)
);
sky130_fd_sc_hd__xor2_1 _652_ (
.A(acc[3]),
.B(\p[3] ),
.X(_084_)
);
sky130_fd_sc_hd__nand2_1 _653_ (
.A(en),
.B(\p[0] ),
.Y(_356_)
);
sky130_fd_sc_hd__xnor2_1 _654_ (
.A(acc[0]),
.B(_356_),
.Y(_025_)
);
sky130_fd_sc_hd__xnor2_1 _655_ (
.A(_087_),
.B(_088_),
.Y(_357_)
);
sky130_fd_sc_hd__nor2_1 _656_ (
.A(en),
.B(acc[5]),
.Y(_358_)
);
sky130_fd_sc_hd__a21oi_1 _657_ (
.A1(en),
.A2(_357_),
.B1(_358_),
.Y(_024_)
);
sky130_fd_sc_hd__nor3_1 _658_ (
.A(_191_),
.B(_315_),
.C(_317_),
.Y(_359_)
);
sky130_fd_sc_hd__nor3_1 _659_ (
.A(_052_),
.B(_318_),
.C(_359_),
.Y(_360_)
);
sky130_fd_sc_hd__a21o_1 _660_ (
.A1(_052_),
.A2(\p[12] ),
.B1(_360_),
.X(_023_)
);
sky130_fd_sc_hd__nor2_1 _661_ (
.A(_075_),
.B(_076_),
.Y(_361_)
);
sky130_fd_sc_hd__xor2_1 _662_ (
.A(_092_),
.B(_361_),
.X(_362_)
);
sky130_fd_sc_hd__maj3_1 _663_ (
.A(acc[3]),
.B(\p[3] ),
.C(_083_),
.X(_085_)
);
sky130_fd_sc_hd__mux2_1 _664_ (
.A0(acc[7]),
.A1(_362_),
.S(en),
.X(_022_)
);
sky130_fd_sc_hd__nor2b_1 _665_ (
.A(_070_),
.B_N(_071_),
.Y(_363_)
);
sky130_fd_sc_hd__xnor2_1 _666_ (
.A(_095_),
.B(_363_),
.Y(_364_)
);
sky130_fd_sc_hd__nor2_1 _667_ (
.A(en),
.B(acc[9]),
.Y(_365_)
);
sky130_fd_sc_hd__a21oi_1 _668_ (
.A1(en),
.A2(_364_),
.B1(_365_),
.Y(_021_)
);
sky130_fd_sc_hd__xor2_1 _669_ (
.A(acc[17]),
.B(_105_),
.X(_020_)
);
sky130_fd_sc_hd__xnor2_1 _670_ (
.A(_081_),
.B(_082_),
.Y(_366_)
);
sky130_fd_sc_hd__nor2_1 _671_ (
.A(en),
.B(acc[2]),
.Y(_367_)
);
sky130_fd_sc_hd__a21oi_1 _672_ (
.A1(en),
.A2(_366_),
.B1(_367_),
.Y(_019_)
);
sky130_fd_sc_hd__mux2_1 _673_ (
.A0(\rb[0] ),
.A1(b[0]),
.S(en),
.X(_018_)
);
sky130_fd_sc_hd__xor2_1 _674_ (
.A(acc[4]),
.B(\p[4] ),
.X(_086_)
);
sky130_fd_sc_hd__mux2_1 _675_ (
.A0(\rb[1] ),
.A1(b[1]),
.S(en),
.X(_017_)
);
sky130_fd_sc_hd__mux2_1 _676_ (
.A0(\rb[2] ),
.A1(b[2]),
.S(en),
.X(_016_)
);
sky130_fd_sc_hd__mux2_1 _677_ (
.A0(\rb[3] ),
.A1(b[3]),
.S(en),
.X(_015_)
);
sky130_fd_sc_hd__mux2_1 _678_ (
.A0(\rb[4] ),
.A1(b[4]),
.S(en),
.X(_014_)
);
sky130_fd_sc_hd__mux2_1 _679_ (
.A0(\rb[5] ),
.A1(b[5]),
.S(en),
.X(_013_)
);
sky130_fd_sc_hd__mux2_1 _680_ (
.A0(\rb[6] ),
.A1(b[6]),
.S(en),
.X(_012_)
);
sky130_fd_sc_hd__nor2_1 _681_ (
.A(en),
.B(\p[0] ),
.Y(_368_)
);
sky130_fd_sc_hd__a21oi_1 _682_ (
.A1(en),
.A2(_295_),
.B1(_368_),
.Y(_011_)
);
sky130_fd_sc_hd__a22oi_1 _683_ (
.A1(\ra[1] ),
.A2(\rb[0] ),
.B1(\rb[1] ),
.B2(\ra[0] ),
.Y(_369_)
);
sky130_fd_sc_hd__nand2_1 _684_ (
.A(en),
.B(_296_),
.Y(_370_)
);
sky130_fd_sc_hd__maj3_1 _685_ (
.A(acc[4]),
.B(\p[4] ),
.C(_085_),
.X(_087_)
);
sky130_fd_sc_hd__o2bb2ai_1 _686_ (
.A1_N(_052_),
.A2_N(\p[1] ),
.B1(_369_),
.B2(_370_),
.Y(_010_)
);
sky130_fd_sc_hd__xor2_1 _687_ (
.A(_296_),
.B(_297_),
.X(_371_)
);
sky130_fd_sc_hd__nor2_1 _688_ (
.A(en),
.B(\p[2] ),
.Y(_372_)
);
sky130_fd_sc_hd__a21oi_1 _689_ (
.A1(en),
.A2(_371_),
.B1(_372_),
.Y(_009_)
);
sky130_fd_sc_hd__xnor2_1 _690_ (
.A(_298_),
.B(_299_),
.Y(_373_)
);
sky130_fd_sc_hd__nor2_1 _691_ (
.A(en),
.B(\p[3] ),
.Y(_374_)
);
sky130_fd_sc_hd__a21oi_1 _692_ (
.A1(en),
.A2(_373_),
.B1(_374_),
.Y(_008_)
);
sky130_fd_sc_hd__nor2_1 _693_ (
.A(_300_),
.B(_302_),
.Y(_375_)
);
sky130_fd_sc_hd__nand2_1 _694_ (
.A(en),
.B(_303_),
.Y(_376_)
);
sky130_fd_sc_hd__o2bb2ai_1 _695_ (
.A1_N(_052_),
.A2_N(\p[4] ),
.B1(_375_),
.B2(_376_),
.Y(_007_)
);
sky130_fd_sc_hd__xor2_1 _696_ (
.A(acc[5]),
.B(\p[5] ),
.X(_088_)
);
sky130_fd_sc_hd__nand2_1 _697_ (
.A(_303_),
.B(_304_),
.Y(_377_)
);
sky130_fd_sc_hd__nand2_1 _698_ (
.A(_305_),
.B(_377_),
.Y(_378_)
);
sky130_fd_sc_hd__nor2_1 _699_ (
.A(en),
.B(\p[5] ),
.Y(_379_)
);
sky130_fd_sc_hd__a21oi_1 _700_ (
.A1(en),
.A2(_378_),
.B1(_379_),
.Y(_006_)
);
sky130_fd_sc_hd__nand3_1 _701_ (
.A(_284_),
.B(_294_),
.C(_305_),
.Y(_380_)
);
sky130_fd_sc_hd__a21oi_1 _702_ (
.A1(_306_),
.A2(_380_),
.B1(_052_),
.Y(_381_)
);
sky130_fd_sc_hd__nor2_1 _703_ (
.A(en),
.B(\p[6] ),
.Y(_382_)
);
sky130_fd_sc_hd__nor2_1 _704_ (
.A(_381_),
.B(_382_),
.Y(_005_)
);
sky130_fd_sc_hd__nor2_1 _705_ (
.A(en),
.B(\p[7] ),
.Y(_383_)
);
sky130_fd_sc_hd__nand3_1 _706_ (
.A(_266_),
.B(_283_),
.C(_306_),
.Y(_384_)
);
sky130_fd_sc_hd__maj3_1 _707_ (
.A(acc[5]),
.B(\p[5] ),
.C(_087_),
.X(_089_)
);
sky130_fd_sc_hd__nand2b_1 _708_ (
.A_N(_307_),
.B(_384_),
.Y(_385_)
);
sky130_fd_sc_hd__a21oi_1 _709_ (
.A1(en),
.A2(_385_),
.B1(_383_),
.Y(_004_)
);
sky130_fd_sc_hd__xor2_1 _710_ (
.A(_265_),
.B(_307_),
.X(_386_)
);
sky130_fd_sc_hd__nor2_1 _711_ (
.A(en),
.B(\p[8] ),
.Y(_387_)
);
sky130_fd_sc_hd__a21oi_1 _712_ (
.A1(en),
.A2(_386_),
.B1(_387_),
.Y(_003_)
);
sky130_fd_sc_hd__nand3_1 _713_ (
.A(_264_),
.B(_308_),
.C(_309_),
.Y(_388_)
);
sky130_fd_sc_hd__a21oi_1 _714_ (
.A1(_310_),
.A2(_388_),
.B1(_052_),
.Y(_389_)
);
sky130_fd_sc_hd__nor2_1 _715_ (
.A(en),
.B(\p[9] ),
.Y(_390_)
);
sky130_fd_sc_hd__nor2_1 _716_ (
.A(_389_),
.B(_390_),
.Y(_002_)
);
sky130_fd_sc_hd__xnor2_1 _717_ (
.A(_311_),
.B(_312_),
.Y(_391_)
);
sky130_fd_sc_hd__nor2_1 _718_ (
.A(acc[6]),
.B(\p[6] ),
.Y(_090_)
);
sky130_fd_sc_hd__nor2_1 _719_ (
.A(en),
.B(\p[10] ),
.Y(_392_)
);
sky130_fd_sc_hd__a21oi_1 _720_ (
.A1(en),
.A2(_391_),
.B1(_392_),
.Y(_001_)
);
sky130_fd_sc_hd__nor3_1 _721_ (
.A(_217_),
.B(_313_),
.C(_314_),
.Y(_393_)
);
sky130_fd_sc_hd__nor3_1 _722_ (
.A(_052_),
.B(_315_),
.C(_393_),
.Y(_394_)
);
sky130_fd_sc_hd__a21o_1 _723_ (
.A1(_052_),
.A2(\p[11] ),
.B1(_394_),
.X(_000_)
);
sky130_fd_sc_hd__and2_0 _724_ (
.A(\p[14] ),
.B(acc[14]),
.X(_055_)
);
sky130_fd_sc_hd__nor2_1 _725_ (
.A(_077_),
.B(_090_),
.Y(_091_)
);
sky130_fd_sc_hd__a21o_1 _726_ (
.A1(_089_),
.A2(_091_),
.B1(_077_),
.X(_092_)
);
sky130_fd_sc_hd__a211oi_1 _727_ (
.A1(_089_),
.A2(_091_),
.B1(_075_),
.C1(_077_),
.Y(_093_)
);
sky130_fd_sc_hd__nor2_1 _728_ (
.A(_076_),
.B(_093_),
.Y(_094_)
);
sky130_fd_sc_hd__o31ai_1 _729_ (
.A1(_073_),
.A2(_076_),
.A3(_093_),
.B1(_072_),
.Y(_095_)
);
sky130_fd_sc_hd__o21a_1 _730_ (
.A1(_070_),
.A2(_095_),
.B1(_071_),
.X(_096_)
);
sky130_fd_sc_hd__o211a_1 _731_ (
.A1(_070_),
.A2(_095_),
.B1(_071_),
.C1(_069_),
.X(_097_)
);
sky130_fd_sc_hd__nor2_1 _732_ (
.A(_067_),
.B(_097_),
.Y(_098_)
);
sky130_fd_sc_hd__a21oi_1 _733_ (
.A1(_064_),
.A2(_098_),
.B1(_065_),
.Y(_099_)
);
sky130_fd_sc_hd__o311ai_0 _734_ (
.A1(_063_),
.A2(_067_),
.A3(_097_),
.B1(_066_),
.C1(_062_),
.Y(_100_)
);
sky130_fd_sc_hd__nor2_1 _735_ (
.A(\p[14] ),
.B(acc[14]),
.Y(_056_)
);
sky130_fd_sc_hd__a31oi_1 _736_ (
.A1(_058_),
.A2(_060_),
.A3(_100_),
.B1(_059_),
.Y(_101_)
);
sky130_fd_sc_hd__a21oi_1 _737_ (
.A1(_057_),
.A2(_101_),
.B1(_055_),
.Y(_102_)
);
sky130_fd_sc_hd__o21ai_0 _738_ (
.A1(\p[15] ),
.A2(acc[15]),
.B1(en),
.Y(_103_)
);
sky130_fd_sc_hd__a21oi_1 _739_ (
.A1(_054_),
.A2(_102_),
.B1(_103_),
.Y(_104_)
);
sky130_fd_sc_hd__a211oi_1 _740_ (
.A1(_054_),
.A2(_102_),
.B1(_103_),
.C1(_053_),
.Y(_105_)
);
sky130_fd_sc_hd__nand2_1 _741_ (
.A(acc[17]),
.B(_105_),
.Y(_106_)
);
sky130_fd_sc_hd__nand3_1 _742_ (
.A(acc[18]),
.B(acc[17]),
.C(_105_),
.Y(_107_)
);
sky130_fd_sc_hd__xnor2_1 _743_ (
.A(acc[18]),
.B(_106_),
.Y(_050_)
);
sky130_fd_sc_hd__xnor2_1 _744_ (
.A(_085_),
.B(_086_),
.Y(_108_)
);
sky130_fd_sc_hd__nor2_1 _745_ (
.A(en),
.B(acc[4]),
.Y(_109_)
);
sky130_fd_sc_hd__nor2_1 _746_ (
.A(_055_),
.B(_056_),
.Y(_057_)
);
sky130_fd_sc_hd__a21oi_1 _747_ (
.A1(en),
.A2(_108_),
.B1(_109_),
.Y(_049_)
);
sky130_fd_sc_hd__xnor2_1 _748_ (
.A(acc[19]),
.B(_107_),
.Y(_048_)
);
sky130_fd_sc_hd__nor2_1 _749_ (
.A(en),
.B(\p[15] ),
.Y(_110_)
);
sky130_fd_sc_hd__nand2_1 _750_ (
.A(\rb[7] ),
.B(\ra[4] ),
.Y(_111_)
);
sky130_fd_sc_hd__nand2_1 _751_ (
.A(\ra[6] ),
.B(\rb[3] ),
.Y(_112_)
);
sky130_fd_sc_hd__nand2_1 _752_ (
.A(\ra[6] ),
.B(\rb[4] ),
.Y(_113_)
);
sky130_fd_sc_hd__nand2_1 _753_ (
.A(\ra[7] ),
.B(\rb[3] ),
.Y(_114_)
);
sky130_fd_sc_hd__nand2_1 _754_ (
.A(\ra[5] ),
.B(\rb[5] ),
.Y(_115_)
);
sky130_fd_sc_hd__xnor2_1 _755_ (
.A(_113_),
.B(_114_),
.Y(_116_)
);
sky130_fd_sc_hd__maj3_1 _756_ (
.A(_113_),
.B(_114_),
.C(_115_),
.X(_117_)
);
sky130_fd_sc_hd__nand2_1 _757_ (
.A(acc[13]),
.B(\p[13] ),
.Y(_058_)
);
sky130_fd_sc_hd__nand2_1 _758_ (
.A(\ra[5] ),
.B(\rb[6] ),
.Y(_118_)
);
sky130_fd_sc_hd__xnor2_1 _759_ (
.A(_117_),
.B(_118_),
.Y(_119_)
);
sky130_fd_sc_hd__xnor2_1 _760_ (
.A(_111_),
.B(_119_),
.Y(_120_)
);
sky130_fd_sc_hd__nand2_1 _761_ (
.A(\ra[7] ),
.B(\rb[5] ),
.Y(_121_)
);
sky130_fd_sc_hd__nor2_1 _762_ (
.A(_113_),
.B(_121_),
.Y(_122_)
);
sky130_fd_sc_hd__a22oi_1 _763_ (
.A1(\ra[7] ),
.A2(\rb[4] ),
.B1(\rb[5] ),
.B2(\ra[6] ),
.Y(_123_)
);
sky130_fd_sc_hd__nor2_1 _764_ (
.A(_122_),
.B(_123_),
.Y(_124_)
);
sky130_fd_sc_hd__nand2b_1 _765_ (
.A_N(_120_),
.B(_124_),
.Y(_125_)
);
sky130_fd_sc_hd__nand2_1 _766_ (
.A(\rb[7] ),
.B(\ra[5] ),
.Y(_126_)
);
sky130_fd_sc_hd__nand2_1 _767_ (
.A(\ra[6] ),
.B(\rb[6] ),
.Y(_127_)
);
sky130_fd_sc_hd__nor2_1 _768_ (
.A(acc[13]),
.B(\p[13] ),
.Y(_059_)
);
sky130_fd_sc_hd__clkinv_1 _769_ (
.A(_127_),
.Y(_128_)
);
sky130_fd_sc_hd__nor2_1 _770_ (
.A(_122_),
.B(_128_),
.Y(_129_)
);
sky130_fd_sc_hd__nand2_1 _771_ (
.A(\rb[6] ),
.B(_122_),
.Y(_130_)
);
sky130_fd_sc_hd__a21oi_1 _772_ (
.A1(\rb[6] ),
.A2(_122_),
.B1(_129_),
.Y(_131_)
);
sky130_fd_sc_hd__xnor2_1 _773_ (
.A(_126_),
.B(_131_),
.Y(_132_)
);
sky130_fd_sc_hd__nor2b_1 _774_ (
.A(_121_),
.B_N(_132_),
.Y(_133_)
);
sky130_fd_sc_hd__xor2_1 _775_ (
.A(_121_),
.B(_132_),
.X(_134_)
);
sky130_fd_sc_hd__maj3_1 _776_ (
.A(_111_),
.B(_117_),
.C(_118_),
.X(_135_)
);
sky130_fd_sc_hd__xnor2_1 _777_ (
.A(_125_),
.B(_134_),
.Y(_136_)
);
sky130_fd_sc_hd__maj3_1 _778_ (
.A(_125_),
.B(_134_),
.C(_135_),
.X(_137_)
);
sky130_fd_sc_hd__nand2_1 _779_ (
.A(acc[12]),
.B(\p[12] ),
.Y(_060_)
);
sky130_fd_sc_hd__o21ai_0 _780_ (
.A1(_126_),
.A2(_129_),
.B1(_130_),
.Y(_138_)
);
sky130_fd_sc_hd__a22oi_1 _781_ (
.A1(\rb[7] ),
.A2(\ra[6] ),
.B1(\rb[6] ),
.B2(\ra[7] ),
.Y(_139_)
);
sky130_fd_sc_hd__a31oi_1 _782_ (
.A1(\ra[7] ),
.A2(\rb[7] ),
.A3(_128_),
.B1(_139_),
.Y(_140_)
);
sky130_fd_sc_hd__xnor2_1 _783_ (
.A(_133_),
.B(_140_),
.Y(_141_)
);
sky130_fd_sc_hd__xor2_1 _784_ (
.A(_138_),
.B(_141_),
.X(_142_)
);
sky130_fd_sc_hd__or2_0 _785_ (
.A(_137_),
.B(_142_),
.X(_143_)
);
sky130_fd_sc_hd__nand2_1 _786_ (
.A(\ra[6] ),
.B(\rb[1] ),
.Y(_144_)
);
sky130_fd_sc_hd__nand2_1 _787_ (
.A(\ra[4] ),
.B(\rb[5] ),
.Y(_145_)
);
sky130_fd_sc_hd__nand2_1 _788_ (
.A(\ra[5] ),
.B(\rb[4] ),
.Y(_146_)
);
sky130_fd_sc_hd__nand2_1 _789_ (
.A(\ra[5] ),
.B(\rb[3] ),
.Y(_147_)
);
sky130_fd_sc_hd__dfrtp_1 _790_ (
.CLK(clk),
.D(_012_),
.Q(\rb[6] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _791_ (
.CLK(clk),
.D(_046_),
.Q(\rb[7] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _792_ (
.CLK(clk),
.D(_011_),
.Q(\p[0] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _793_ (
.CLK(clk),
.D(_010_),
.Q(\p[1] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _794_ (
.CLK(clk),
.D(_009_),
.Q(\p[2] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _795_ (
.CLK(clk),
.D(_008_),
.Q(\p[3] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _796_ (
.CLK(clk),
.D(_007_),
.Q(\p[4] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _797_ (
.CLK(clk),
.D(_006_),
.Q(\p[5] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _798_ (
.CLK(clk),
.D(_005_),
.Q(\p[6] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _799_ (
.CLK(clk),
.D(_004_),
.Q(\p[7] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _800_ (
.CLK(clk),
.D(_003_),
.Q(\p[8] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _801_ (
.CLK(clk),
.D(_002_),
.Q(\p[9] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _802_ (
.CLK(clk),
.D(_001_),
.Q(\p[10] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _803_ (
.CLK(clk),
.D(_000_),
.Q(\p[11] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _804_ (
.CLK(clk),
.D(_023_),
.Q(\p[12] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _805_ (
.CLK(clk),
.D(_027_),
.Q(\p[13] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _806_ (
.CLK(clk),
.D(_032_),
.Q(\p[14] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _807_ (
.CLK(clk),
.D(_047_),
.Q(\p[15] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _808_ (
.CLK(clk),
.D(_025_),
.Q(acc[0]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _809_ (
.CLK(clk),
.D(_028_),
.Q(acc[1]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _810_ (
.CLK(clk),
.D(_019_),
.Q(acc[2]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _811_ (
.CLK(clk),
.D(_026_),
.Q(acc[3]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _812_ (
.CLK(clk),
.D(_049_),
.Q(acc[4]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _813_ (
.CLK(clk),
.D(_024_),
.Q(acc[5]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _814_ (
.CLK(clk),
.D(_034_),
.Q(acc[6]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _815_ (
.CLK(clk),
.D(_022_),
.Q(acc[7]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _816_ (
.CLK(clk),
.D(_036_),
.Q(acc[8]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _817_ (
.CLK(clk),
.D(_021_),
.Q(acc[9]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _818_ (
.CLK(clk),
.D(_037_),
.Q(acc[10]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _819_ (
.CLK(clk),
.D(_033_),
.Q(acc[11]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _820_ (
.CLK(clk),
.D(_038_),
.Q(acc[12]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _821_ (
.CLK(clk),
.D(_029_),
.Q(acc[13]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _822_ (
.CLK(clk),
.D(_031_),
.Q(acc[14]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _823_ (
.CLK(clk),
.D(_035_),
.Q(acc[15]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _824_ (
.CLK(clk),
.D(_030_),
.Q(acc[16]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _825_ (
.CLK(clk),
.D(_020_),
.Q(acc[17]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _826_ (
.CLK(clk),
.D(_050_),
.Q(acc[18]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _827_ (
.CLK(clk),
.D(_048_),
.Q(acc[19]),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _828_ (
.CLK(clk),
.D(_045_),
.Q(\ra[0] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _829_ (
.CLK(clk),
.D(_044_),
.Q(\ra[1] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _830_ (
.CLK(clk),
.D(_043_),
.Q(\ra[2] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _831_ (
.CLK(clk),
.D(_042_),
.Q(\ra[3] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _832_ (
.CLK(clk),
.D(_041_),
.Q(\ra[4] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _833_ (
.CLK(clk),
.D(_040_),
.Q(\ra[5] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _834_ (
.CLK(clk),
.D(_039_),
.Q(\ra[6] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _835_ (
.CLK(clk),
.D(_051_),
.Q(\ra[7] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _836_ (
.CLK(clk),
.D(_018_),
.Q(\rb[0] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _837_ (
.CLK(clk),
.D(_017_),
.Q(\rb[1] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _838_ (
.CLK(clk),
.D(_016_),
.Q(\rb[2] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _839_ (
.CLK(clk),
.D(_015_),
.Q(\rb[3] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _840_ (
.CLK(clk),
.D(_014_),
.Q(\rb[4] ),
.RESET_B(rst_n)
);
sky130_fd_sc_hd__dfrtp_1 _841_ (
.CLK(clk),
.D(_013_),
.Q(\rb[5] ),
.RESET_B(rst_n)
);
endmodule
Check yourself
Remember
- CTS replaces the clock net by a tree: cluster the sinks, build a balanced topology, insert buffers, balance, legalize.
- An H-tree equalizes root-to-leaf wire length; dummy loads even out the load of lightly used leaves.
- Clock buffers match rise and fall delay to keep the duty cycle; clocks route on low-resistance upper metal, often with an NDR.
- The stronger tree measured here reduces latency and skew at higher power. Ungated clock nets switch every cycle regardless of data.