Transconductance and gm/ID

Measure a transistor's transconductance, see where the square-law formula for it fails, and size a device from a gm/ID chart that works in every region.

Lesson
E2.5
Time
30 min
Runs on
ngspice
Check
5 questions

A designer wanted plenty of gain from very little current. They biased an NMOS (W = 2 µm, L = 0.5 µm) just 50 mV above its 0.578 V threshold, where it carried 1.154 µA. The square-law formula gm = 2ID/Vov promised 46.2 µS, but the simulator measured 23.3 µS, and the amplifier built on it had half the expected gain.

DC sweepgm/ID measured against the square law's 2/VovOne NMOS (W = 2 µm, L = 0.5 µm, VDS = 0.9 V): the solid curve is the simulator and the dashed curve is 2/(VGS − 0.578 V).
  • simulated gm/ID
  • square law 2/Vov
010203040gm/ID in 1/V0.6 V0.7 V0.8 V0.9 V1.0 V1.1 V1.2 VGate voltage V_GSVov = 50 mVVov = 0.2 V010203040gm/ID in 1/V0.6 V0.8 V1.0 V1.2 VGate voltage V_GSVov = 50 mVVov = 0.2 V
  1. Gate voltage V_GS 628 mVsimulated gm/ID = 20.22 · square law 2/Vov = 40

    At Vov = 50 mV the formula says 40 per volt while the device gives 20.2, so a formula that predicts gm from ID and Vov is off by a factor of two here.

  2. Gate voltage V_GS 678 mVsimulated gm/ID = 17.48 · square law 2/Vov = 20

    At Vov = 0.1 V the formula gives 20 and the device 17.5, so the gap is closing.

  3. Gate voltage V_GS 705.2 mVsimulated gm/ID = 15.73 · square law 2/Vov = 15.72

    The curves cross near VGS = 0.705 V, the one bias where the formula happens to be right.

  4. Gate voltage V_GS 778 mVsimulated gm/ID = 11.33 · square law 2/Vov = 10

    At Vov = 0.2 V the error flips sign: the formula says 10, the device gives 11.3.

  5. Gate voltage V_GS 978 mVsimulated gm/ID = 5.176 · square law 2/Vov = 5

    At Vov = 0.4 V the formula gives 5 and the device 5.18: in strong inversion the two agree within a few percent.

Read the plot as a table
Gate voltage V_GSsimulated gm/IDsquare law 2/Vov
600 mV21.2990.91
628 mV20.2240
678 mV17.4820
700 mV16.0616.39
705.2 mV15.7315.72
778 mV11.3310
800 mV10.249.009
900 mV6.7436.211
978 mV5.1765
1 V4.8464.739
1.1 V3.7283.831
1.2 V2.9983.215

Measured on ngspice 42 with the SKY130 tt models (301 sweep points). The square law grows without limit as Vov falls; the device flattens out.

The formula fails where the device stops obeying the square law, and a low-power design lives exactly there.

What gm measures

Raise the gate of a saturated transistor by a few millivolts and its drain current rises; the ratio is the transconductance gm = ∂ID/∂VGS, in siemens. It is the gain of the device itself, because a small signal vgs on the gate becomes a current gm·vgs in the drain.

The square law of E2.3, ID = ½μCox(W/L)Vov² with the overdrive Vov = VGS − Vth, gives three forms of gm: μCox(W/L)Vov, √(2μCox(W/L)ID) and 2ID/Vov. They are the same equation rearranged, so they stand or fall together. The last one needs no process constant, which is why designers reach for it.

Divide by the current and the last form becomes gm/ID = 2/Vov. That ratio is the transconductance efficiency: how much gm each ampere of bias buys, in V−1. The hook's plot compares that ratio with the simulator. Below about 0.13 V of overdrive the square law promises too much, because its 2/Vov grows without limit. The device cannot follow: near and below the threshold the channel is weakly inverted and current grows exponentially with VGS (E2.6), which caps gm/ID.

VovSquare law 2/VovSimulated gm/IDFormula error
50 mV40 V−120.2 V−1+98 %
0.1 V20 V−117.5 V−1+14 %
0.2 V10 V−111.3 V−1−12 %
0.4 V5 V−15.18 V−1−3.4 %

W = 2 µm, L = 0.5 µm, VDS = 0.9 V, Vth = 0.578 V (ID = 100 nA·W/L at this VDS; E2.2 measures 0.594 V at 50 mV, the gap is DIBL). Simulated values from the hook's run.

The error also depends on which threshold you subtract. A threshold is a definition (E2.2), and a few tens of millivolts shift every Vov in the table. A better method needs no threshold at all.

One chart per length: gm/ID against current density

Divide the drain current by the width and you get the current density ID/W, in A/µm. Two devices of the same length at the same density have the same gm/ID, whatever their widths. The reason is simple: two identical devices side by side carry twice the current and give twice the gm, so the ratio and the density stay put.

The chart below sweeps the density itself: an amplifier holds each drain at 0.9 V while a source feeds it 10x A per µm of width, so x = −6 means 1 µA/µm.

DC sweepgm/ID against current density for three lengthsNMOS with W = 2 µm at VDS = 0.9 V; the x axis is the base-10 logarithm of ID/W in A/µm, so −10.5 is 32 pA/µm, −9 is 1 nA/µm and −4 is 100 µA/µm.
  • L = 0.15 µm
  • L = 0.5 µm
  • L = 1 µm
051015202530gm/ID in 1/V-10-9-8-7-6-5-4log10 of I_D/W (A per µm)weak inversion above 20strong inversion below 100102030gm/ID in 1/V-10-8-6-4log10 of I_D/W (A per µm)weak inversion above 20strong inversion below 10
  1. log10 of I_D/W (A per µm) -10.5L = 0.15 µm = 25.18 · L = 0.5 µm = 26.45 · L = 1 µm = 28.31

    At 32 pA/µm every length is deep in weak inversion, flat at its limit 1/(n·UT): 25.2, 26.4 and 28.3 per volt.

  2. log10 of I_D/W (A per µm) -6.198L = 0.15 µm = 21.16 · L = 0.5 µm = 20 · L = 1 µm = 18.16

    The L = 0.5 µm curve crosses 20 at 0.634 µA/µm; above 20 we call a device weakly inverted.

  3. log10 of I_D/W (A per µm) -6L = 0.15 µm = 20.3 · L = 0.5 µm = 18.78 · L = 1 µm = 16.5

    At 1 µA/µm the lengths spread to 20.3, 18.8 and 16.5, because a longer device leaves weak inversion at a lower density.

  4. log10 of I_D/W (A per µm) -5.557L = 0.15 µm = 17.83 · L = 0.5 µm = 15 · L = 1 µm = 12.07

    L = 0.5 µm reaches 15 at 2.77 µA/µm, in the middle of moderate inversion, where the sizing example below starts.

  5. log10 of I_D/W (A per µm) -5L = 0.15 µm = 13.61 · L = 0.5 µm = 9.168 · L = 1 µm = 6.647

    At 10 µA/µm the values are 13.6, 9.17 and 6.65, and the long devices are now in strong inversion, below 10.

  6. log10 of I_D/W (A per µm) -4L = 0.15 µm = 4.114 · L = 0.5 µm = 2.295 · L = 1 µm = 1.427

    At 100 µA/µm gm/ID has fallen to 4.11, 2.29 and 1.43, so pushing more current through the same width buys little extra gm.

Read the plot as a table
log10 of I_D/W (A per µm)L = 0.15 µmL = 0.5 µmL = 1 µm
-10.525.1826.4528.31
-1025.1626.3528.15
-925.0425.8927.4
-824.6524.725.54
-723.4722.6722.44
-6.19821.162018.16
-620.318.7816.5
-5.55717.831512.07
-513.619.1686.647
-44.1142.2951.427

Measured on ngspice 42 with the SKY130 tt models (651 points per curve, gmin lowered). The 10 and 20 boundaries are this track's convention, not a law.

The lab checks the width claim at L = 0.5 µm. W = 8 µm runs 1.4 % to 4.3 % above W = 2 µm, a small edge effect of narrow devices. Close enough to size from one chart, then confirm on the bench.

ID/WW = 2 µmW = 8 µm
0.1 µA/µmw2_100n = 2.267912e+01w8_100n = 2.300638e+01
1 µA/µmw2_1u = 1.878629e+01w8_1u = 1.921929e+01
10 µA/µmw2_10u = 9.168153e+00w8_10u = 9.563556e+00

gm/ID in V−1 at L = 0.5 µm and VDS = 0.9 V, from the lab netlist.

The flat left end of the chart has a physical meaning. In weak inversion ID ∝ exp(VGS/(n·UT)). UT = kT/q is the thermal voltage, 25.9 mV at 27 °C. n is the slope factor: only 1/n of a gate change reaches the channel. Then gm/ID = 1/(n·UT), the device's limit; 26.4 V−1 at L = 0.5 µm gives n = 1.46.

Sizing a device with the chart

The bench that checks a sized deviceIB sets the drain current, and an amplifier compares the drain with 0.9 V and drives the gate, so VDS stays at 0.9 V whatever the device needs.
The bench that checks a sized device−++VDD1.8 VIB6.667 µAM3W/L = 2.4/0.5E1VREF0.9 Vd30.900 Vg30.715 V
  1. The current is set

    IB pushes 6.667 µA into the drain, and M3 must carry all of it.

    6.667 µA

  2. The amplifier finds the gate voltage

    If the drain rises above 0.9 V, the amplifier raises the gate, M3 conducts more and pulls the drain back down, until the loop settles with VGS = 0.715 V.

  3. Read gm

    Sweep IB a little and watch the gate: gm = ΔID/ΔVGS, and the lab measures 100.3 µS.

Read the circuit as text
  • IB current source (6.667 µA): + → VDD, − → d3
  • M3 NMOS transistor (W/L = 2.4/0.5): gate → g3, drain → d3, source → 0
  • E1 op-amp: −in → n1, +in → d3, out → g3
  • VREF voltage source (0.9 V): + → n1, − → 0
  • d3 = 0.900 V
  • g3 = 0.715 V

In the netlist the amplifier is E1 g3 0 d3 ref 1e4. Swap its two inputs and ngspice still finds a DC answer, but that loop is unstable: a real circuit would run away from it.

Now the gm/ID method, step by step, for a stage that needs gm = 100 µS at L = 0.5 µm.

  1. Choose gm/ID

    High values save current and low values give a smaller, faster device; take 15 V−1, in moderate inversion.

  2. Compute the current

    Then ID = gm/(gm/ID) = 100 µS / 15 V−1 = 6.667 µA.

  3. Read the density

    On the L = 0.5 µm curve, gm/ID = 15 at 2.77 µA/µm (jd_at_15 in the lab).

  4. Compute the width

    W = 6.667 µA / 2.77 µA/µm = 2.41 µm, which rounds to 2.4 µm.

  5. Check on the bench

    The current-fed bench measures gm = 100.3 µS, within 0.3 % of the target, with no threshold and no μCox anywhere.

The same method works at any inversion level because the chart is measured, which the square law cannot match. Here both methods size a device for gm = 100 µS from 5 µA, which needs gm/ID = 20.

Sized by the square law

* 2/Vov = 20 means Vov = 0.1 V;
* W = 3.4 puts 5 uA at about that overdrive
IB vdd d3 DC 5u
XM3 d3 g3 0 0 sky130_fd_pr__nfet_01v8 W=3.4 L=0.5
.control
dc IB 4u 8u 0.01u
let gm3 = 1/deriv(v(g3))
meas dc gm_m3 FIND gm3 AT=5u
.endc

gm_m3 = 8.839424e-05: 88.4 µS, 12 % short.

Sized from the chart

* g_m/I_D = 20 at 0.634 uA/um on the L = 0.5 curve:
* W = 5 uA / 0.634 uA/um = 7.9 um
IB vdd d3 DC 5u
XM3 d3 g3 0 0 sky130_fd_pr__nfet_01v8 W=7.9 L=0.5
.control
dc IB 4u 8u 0.01u
let gm3 = 1/deriv(v(g3))
meas dc gm_m3 FIND gm3 AT=5u
.endc

gm_m3 = 1.018714e-04: 101.9 µS, about 2 % above the W = 2 µm chart.

Both on the bench above (VDD, E1 and VREF as drawn), measured on ngspice 42.

High gm/ID is not free: less density means more width for the same current, so more gate area and more capacitance to charge. The device gets slower; E3.1 measures that speed as fT. Weak inversion suits low-power and low-frequency stages, strong inversion suits fast ones, and moderate inversion is the usual compromise.

Asked in interviews
  1. What is gm? Give three expressions.

    gm = ∂ID/∂VGS at the operating point. The square law gives μCox(W/L)Vov, √(2μCox(W/L)ID) and 2ID/Vov. All three assume long-channel strong inversion; near threshold 2ID/Vov can overstate gm twofold.

  2. Why size with gm/ID?

    At a given length, gm/ID depends only on the current density ID/W. One measured chart per length then sizes any device: pick gm/ID, get ID = gm/(gm/ID), read the density, divide. It works in weak, moderate and strong inversion alike.

  3. What is the maximum gm/ID, and why?

    In weak inversion the current is exponential in VGS, so gm/ID = 1/(n·UT). That is 38.7 V−1 for n = 1 at room temperature, and 25 to 28 V−1 for SKY130 NMOS from L = 0.15 to 1 µm, where n is 1.37 to 1.54.

Try it

Run the netlist. The first sweep moves the shared gate of M1 and M2; let turns each drain current into gm/ID and into a density, and meas ... WHEN jd1=1u reads gm/ID where the density crosses 1 µA/µm. The second sweep moves IB a little around 6.667 µA, so gm = 1/(dVGS/dID).

Now resize M3 for gm = 100 µS at gm/ID = 10: set IB to 10 µA, read the density at 10 from the Plots tab or add meas dc jd_at_10 FIND jd1 WHEN gmid1=10 FALL=LAST, and compute W. Predict gm_m3 before you run.

SPICEngspice 42 · simulator service
Edit the netlist, then run it
Expected measurements: vth = 5.779120e-01 id_50mv = 1.154192e-06 gm_50mv = 2.333730e-05 w2_100n = 2.267912e+01 w8_100n = 2.300638e+01 w2_1u = 1.878629e+01 w8_1u = 1.921929e+01 w2_10u = 9.168153e+00 w8_10u = 9.563556e+00 jd_at_15 = 2.771522e-06 gm_m3 = 1.003128e-04 vg_m3 = 7.153728e-01

Check yourself

Predict the outputM2 is four copies of M1 in parallel (m=4), on the same gate and drain voltages. The run prints the ratio of their gm/ID at VGS = 0.7 V. Type the line meas prints (format: r = 6.319360e-01).
* M1 is one device; M2 is four copies of it in parallel (m=4)
.lib sky130 tt
XM1 d1 g 0 0 sky130_fd_pr__nfet_01v8 W=2 L=0.5
XM2 d2 g 0 0 sky130_fd_pr__nfet_01v8 W=2 L=0.5 m=4
VD1 d1 0 0.9
VD2 d2 0 0.9
VGS g 0 0
.control
dc VGS 0 1.2 0.002
let id1 = -i(VD1)
let id2 = -i(VD2)
let ratio = (deriv(id2)/id2)/(deriv(id1)/id1)
meas dc r FIND ratio AT=0.7
.endc
.end
ConceptRead the chart: at L = 0.5 µm, about which current density gives gm/ID = 15 V−1?
ConceptA device needs ID = 10 µA, and the chart gives a density of 2 µA/µm for the chosen gm/ID. What width do you draw?
ConceptWhich step of a sizing plan is the one that fails on a SKY130 device?
ConceptYou move a stage from gm/ID = 10 to 20 V−1 and keep its gm. What do you pay?

Remember

  • Transconductance gm = ∂ID/∂VGS is the device's gain; gm/ID is how much gm each ampere of bias buys.
  • The square law gives gm/ID = 2/Vov, which grows without limit; the device saturates at 1/(n·UT), about 25-28 V−1 for SKY130 1.8 V NMOS.
  • At a given length gm/ID depends on the current density ID/W, so one measured chart per length sizes any device.
  • The gm/ID method: choose gm/ID, compute ID = gm/(gm/ID), read the density, W = ID/density, then check on a bench.
  • High gm/ID saves current but costs width, capacitance and speed; low gm/ID is fast but power-hungry.