The beta multiplier: a reference that ignores the supply
Build a self-biased current reference, derive its current in the square law and in weak inversion, compare both with the run, and measure how much the supply still moves it.
- Lesson
- E4.4
- Time
- 30 min
- Runs on
- ngspice
- Check
- 5 questions
A 120 kΩ resistor from VDD into a diode-connected NMOS (W/L = 2/1 µm) made an 8.59 µA bias current. When the 1.8 V supply moved by ±10 %, the current moved from 7.23 to 9.97 µA, −15.9 % and +16.0 %. The supply set the current, so the current followed the supply.
- Supply VDD 1.62 Vi_res = 7.228 µA
At −10 % supply the bias is 7.23 µA, 15.9 % low.
- Supply VDD 1.98 Vi_res = 9.965 µA
At +10 % it is 9.97 µA, 16.0 % high: the current moves 1.6 % for every 1 % of supply.
Read the plot as a table
| Supply VDD | i_res |
|---|---|
| 600 mV | 311 nA |
| 800 mV | 1.365 µA |
| 1 V | 2.693 µA |
| 1.2 V | 4.114 µA |
| 1.4 V | 5.582 µA |
| 1.6 V | 7.078 µA |
| 1.62 V | 7.228 µA |
| 1.8 V | 8.591 µA |
| 1.98 V | 9.965 µA |
| 2 V | 10.12 µA |
Measured on ngspice 42, SKY130 tt (281 points): the resistor bias of the lab.
A reference that must hold still cannot take its current from the supply.
Measuring supply sensitivity
Give the dependence a number. The supply sensitivity is the fractional change of the current per fractional change of the supply: S = (ΔI/I)/(ΔVDD/VDD). The lab takes ΔI between 1.62 and 1.98 V, so S = 1 means "1 % of supply moves the current 1 %".
For the resistor bias, I = (VDD − VGS)/R. If VGS held still, S would be VDD/(VDD − VGS) = 1.8/(1.8 − 0.769) = 1.75. VGS rises a little with the current, so the run gives 1.59. Either way it is above 1: the resistor sees only the part of the supply left over after VGS.
A loop that sets its own current
- Equal currents
P2 is diode-connected and P1 shares its gate and source, so the mirror pushes about the same current into both branches.
- Same current, less VGS
N1 and N2 share the gate node a. N2 is four times wider, so it carries the same current at a smaller VGS. Its source rises until it does: VGS1 − VGS2 appears across RS.
- The current that fits
Only one current makes I·RS equal VGS1 − VGS2: here 9.17 µA, with 91.7 mV across RS.
9.17 µA
Read the circuit as text
- P1 PMOS transistor (4/1): gate →
b, source →VDD, drain →a - P2 PMOS transistor (4/1): gate →
b, source →VDD, drain →b - N1 NMOS transistor (2/1): gate →
a, drain →a, source →0 - N2 NMOS transistor (8/1): gate →
a, drain →b, source →s - RS resistor (10 kΩ): pin 1 →
s, pin 2 →0
a= 0.775 Vb= 0.554 Vs= 91.7 mV
Node voltages at VDD = 1.8 V from the lab's base design. NMOS bodies are the substrate at ground, PMOS bodies at VDD.
A self-biased reference sets its current by the circuit itself. In the beta multiplier (also called the constant-gm bias), N1 and N2 share a gate, N2 is K times wider, and RS sits under N2. The PMOS mirror forces the two currents equal. So the loop settles where VGS1 − VGS2 = I·RS.
The supply appears in neither condition. Raise VDD and the extra voltage lands across P1 and N2, whose currents barely depend on it. The circuit also balances with no current at all; E4.5 is about that second state.
Square law. With I = (β/2)(VGS − Vth)2 and β₂ = Kβ₁, the difference of the overdrives is √(2I/β₁)·(1 − 1/√K). Set it equal to I·RS: I = 2(1 − 1/√K)2/(β₁RS2). Then gm1 = 2(1 − 1/√K)/RS, which depends only on RS and K, hence "constant gm". For K = 4, gm1RS = 1.
Weak inversion. With a current exponential in VGS/(nUT), the difference is nUT·ln K, so I = nUT·ln K/RS and gm1RS = ln K = 1.39. Here UT = kT/q is the thermal voltage and n the slope factor from E2.
The run gives gm1RS = 0.896, with 91.7 mV across RS. At 9.17 µA these devices are in moderate inversion, between weak and strong inversion, where neither formula holds. Two effects outside both formulas also lower it. N2's threshold ends 5.1 mV above N1's: its source sits 91.7 mV above its body, which raises the threshold (the body effect), and its wider channel takes back only part of that. And P1 and P2 sit at different VDS, so the two currents are not quite equal.
What RS, K and length do
The formulas still predict the direction of a change, and the lab tests them with five designs on one supply. The figure shows four of them against VDD.
- i_b
- i_r
- i_k
- i_l
- Supply VDD 1 Vi_b = 371.9 nA · i_r = 346.7 nA · i_k = 408.7 nA · i_l = 179.8 nA
At 1.0 V the base design carries only 0.37 µA. At full current P2's VSG alone is 1.25 V, so the loop cannot run yet.
- Supply VDD 1.8 Vi_b = 9.166 µA · i_r = 3.452 µA · i_k = 14.45 µA · i_l = 7.91 µA
At 1.8 V: base 9.17 µA, RS doubled 3.45 µA, K = 8 14.4 µA, four times longer 7.91 µA. Each curve is nearly flat here.
Read the plot as a table
| Supply VDD | i_b | i_r | i_k | i_l |
|---|---|---|---|---|
| 600 mV | 100.8 pA | 100.8 pA | 110.1 pA | 31.36 pA |
| 800 mV | 12.2 nA | 12.16 nA | 13.19 nA | 5.18 nA |
| 1 V | 371.9 nA | 346.7 nA | 408.7 nA | 179.8 nA |
| 1.2 V | 3.319 µA | 2.354 µA | 3.768 µA | 2.339 µA |
| 1.4 V | 7.831 µA | 3.246 µA | 9.956 µA | 6.712 µA |
| 1.6 V | 8.884 µA | 3.365 µA | 13.97 µA | 7.775 µA |
| 1.8 V | 9.166 µA | 3.452 µA | 14.45 µA | 7.91 µA |
| 2 V | 9.381 µA | 3.529 µA | 14.71 µA | 8.013 µA |
Measured on ngspice 42, SKY130 tt (281 points).
| Design | I at 1.8 V | Ratio to base | Square law | Weak inversion | S |
|---|---|---|---|---|---|
| Base: RS 10 kΩ, K = 4 | 9.166 µA | 1 | 1 | 1 | 0.241 |
| RS = 20 kΩ | 3.452 µA | 0.377 | 0.25 | 0.5 | 0.213 |
| K = 8 | 14.45 µA | 1.576 | 1.672 | 1.5 | 0.220 |
| PMOS L = 2 µm | 9.167 µA | 1.000 | 1 | 1 | 0.221 |
| Every device 4 times longer | 7.910 µA | 0.863 | 1 | 1 | 0.133 |
| Resistor bias (hook) | 8.591 µA | 1.593 |
The lab's i18_* and sens_* lines. The formula ratios: (RS/RS,base)−2 and ((1 − 1/√K)/(1 − 1/2))2 in the square law; RS,base/RS and ln K/ln 4 in weak inversion.
Doubling RS divides the current by 2.66: between the square law's 4 and weak inversion's 2, as moderate inversion should be. K = 8 lands between the two as well. Making every device longer at the same W/L changes the current by 14 %, although both formulas depend only on W/L. That is the measured device departing from both.
The beta multiplier's S is 0.241 against 1.59 for the resistor, 6.6 times less. It is not zero because P1's VSD and N2's VDS both follow VDD, and finite ro lets their currents follow too. Lengthening only the PMOS takes S to 0.221; lengthening everything takes it to 0.133. The lever is E4.1's output resistance, and E4.3's cascodes raise it far more than length does.
- n_res
- n_b
- Supply VDD 1.2 Vn_res = 0.4789 · n_b = 0.3621
At 1.2 V the beta multiplier has only 36 % of its current: it is still starting to conduct.
- Supply VDD 1.434 Vn_res = 0.6792 · n_b = 0.9
From 1.434 V up, the beta multiplier stays within 10 % of its 1.8 V value.
- Supply VDD 1.62 Vn_res = 0.8413 · n_b = 0.973
At −10 % supply: the beta multiplier is 2.7 % low, the resistor bias 15.9 % low.
- Supply VDD 1.98 Vn_res = 1.16 · n_b = 1.021
At +10 %: the beta multiplier is 2.1 % high, the resistor bias 16.0 % high.
Read the plot as a table
| Supply VDD | n_res | n_b |
|---|---|---|
| 600 mV | 0.0362 | 11 µ |
| 800 mV | 0.1589 | 0.001331 |
| 1 V | 0.3134 | 0.04058 |
| 1.2 V | 0.4789 | 0.3621 |
| 1.4 V | 0.6497 | 0.8544 |
| 1.434 V | 0.6792 | 0.9 |
| 1.6 V | 0.8238 | 0.9692 |
| 1.62 V | 0.8413 | 0.973 |
| 1.8 V | 1 | 1 |
| 1.98 V | 1.16 | 1.021 |
| 2 V | 1.178 | 1.023 |
Measured on ngspice 42, SKY130 tt (281 points).
Asked in interviews
Design a supply-independent current reference.
A beta multiplier: two NMOS of ratio K with a resistor under the wider one, and a PMOS mirror forcing equal currents. VGS1 − VGS2 = I·RS fixes the current without VDD. Add a start-up circuit for the zero-current state.
Derive the beta multiplier's current, and explain "constant gm".
Square law: I = 2(1 − 1/√K)2/(μCox(W/L)₁RS2), so gm1 = 2(1 − 1/√K)/RS, set by RS and K alone. Weak inversion: I = nUTln K/RS. Real devices in moderate inversion land between; size RS by sweeping it.
What is supply sensitivity, and how do you reduce it?
S = (ΔI/I)/(ΔVDD/VDD). A resistor into a diode gives more than 1 (1.59 here); a beta multiplier about 0.24. Raise the output resistance of the devices whose VDS follows VDD: longer devices, or cascodes.
Try it
Run it: five beta multipliers and the resistor bias share one supply sweep. Each prints its current at 1.8 V and its S; the last lines give the base design's RS voltage, gm1RS, N2's threshold minus N1's and the supply where it reaches 90 % of its current.
Then design one. Change RSb until i18_b is 10 µA, and predict which way gm1_rs moves. Try K = 2 (N2 W=4): the square law says the current falls to (0.293/0.5)2 = 0.34 of the base, weak inversion says 0.5. Then cascode the PMOS mirror and see what S does.
Run the netlist to draw its plots here.
i18_b = 9.166121e-06 sens_b = 2.413797e-01 i18_r = 3.451829e-06 sens_r = 2.132660e-01 i18_k = 1.444547e-05 sens_k = 2.203205e-01 i18_p = 9.166861e-06 sens_p = 2.206753e-01 i18_l = 7.910226e-06 sens_l = 1.332853e-01 i18_res = 8.591344e-06 sens_res = 1.592950e+00 vrs_b = 9.166121e-02 vgs_res = 7.690388e-01 gm1_rs = 8.959438e-01 dvth_n2 = 5.100173e-03 vdd90_b = 1.434040e+00 ires162 = 7.228187e-06 ires198 = 9.965303e-06Check yourself
Remember
- Supply sensitivity S = (ΔI/I)/(ΔVDD/VDD): 1 for a plain resistor, 1.59 for a resistor into a diode, 0.241 for the beta multiplier.
- A beta multiplier sets VGS1 − VGS2 = I·RS with a PMOS mirror forcing equal currents; VDD enters only through finite ro.
- Square law: I ∝ (1 − 1/√K)2/RS2 and gm1RS = 2(1 − 1/√K); weak inversion: I = nUTln K/RS. SKY130 at 9 µA lands between.
- Longer devices or cascodes lower S; size RS by sweeping, not by either formula.