ASIC Point

Your browser is the workbench.

Five tools. Real runs. Pick the experiment you want to try.

Yosys · OpenROAD · KLayout

RTL → GDSII

Write a small clocked design. Watch it become a routed SKY130 block, then download the layout.

Try RTL → GDSII
8-bit MAC in SKY130 after global routing3 % of the tracks4 % of the tracks11 % of the tracks7 % of the tracks4 % of the tracks3 % of the tracks6 % of the tracks16 % of the tracks26 % of the tracks13 % of the tracks7 % of the tracks10 % of the tracks11 % of the tracks6 % of the tracks3 % of the tracks3 % of the tracks6 % of the tracks3 % of the tracks3 % of the tracks20 % of the tracks30 % of the tracks24 % of the tracks29 % of the tracks24 % of the tracks16 % of the tracks13 % of the tracks13 % of the tracks14 % of the tracks14 % of the tracks17 % of the tracks6 % of the tracks14 % of the tracks34 % of the tracks24 % of the tracks19 % of the tracks13 % of the tracks19 % of the tracks17 % of the tracks14 % of the tracks20 % of the tracks13 % of the tracks11 % of the tracks4 % of the tracks4 % of the tracks10 % of the tracks7 % of the tracks26 % of the tracks33 % of the tracks40 % of the tracks29 % of the tracks19 % of the tracks16 % of the tracks21 % of the tracks16 % of the tracks11 % of the tracks31 % of the tracks11 % of the tracks3 % of the tracks7 % of the tracks14 % of the tracks13 % of the tracks26 % of the tracks20 % of the tracks24 % of the tracks21 % of the tracks10 % of the tracks10 % of the tracks16 % of the tracks20 % of the tracks19 % of the tracks40 % of the tracks13 % of the tracks3 % of the tracks4 % of the tracks11 % of the tracks20 % of the tracks33 % of the tracks24 % of the tracks31 % of the tracks20 % of the tracks19 % of the tracks10 % of the tracks13 % of the tracks16 % of the tracks13 % of the tracks31 % of the tracks13 % of the tracks3 % of the tracks6 % of the tracks14 % of the tracks14 % of the tracks26 % of the tracks19 % of the tracks33 % of the tracks24 % of the tracks23 % of the tracks17 % of the tracks19 % of the tracks10 % of the tracks10 % of the tracks26 % of the tracks13 % of the tracks3 % of the tracks7 % of the tracks21 % of the tracks14 % of the tracks30 % of the tracks26 % of the tracks33 % of the tracks30 % of the tracks26 % of the tracks20 % of the tracks27 % of the tracks13 % of the tracks13 % of the tracks30 % of the tracks17 % of the tracks3 % of the tracks10 % of the tracks27 % of the tracks13 % of the tracks23 % of the tracks16 % of the tracks21 % of the tracks14 % of the tracks20 % of the tracks11 % of the tracks13 % of the tracks13 % of the tracks10 % of the tracks23 % of the tracks10 % of the tracks3 % of the tracks11 % of the tracks23 % of the tracks24 % of the tracks29 % of the tracks17 % of the tracks23 % of the tracks17 % of the tracks11 % of the tracks19 % of the tracks20 % of the tracks11 % of the tracks13 % of the tracks21 % of the tracks6 % of the tracks3 % of the tracks10 % of the tracks14 % of the tracks19 % of the tracks13 % of the tracks9 % of the tracks13 % of the tracks17 % of the tracks13 % of the tracks14 % of the tracks21 % of the tracks14 % of the tracks16 % of the tracks11 % of the tracks3 % of the tracks9 % of the tracks17 % of the tracks26 % of the tracks21 % of the tracks16 % of the tracks20 % of the tracks27 % of the tracks21 % of the tracks13 % of the tracks21 % of the tracks21 % of the tracks27 % of the tracks9 % of the tracks6 % of the tracks10 % of the tracks10 % of the tracks13 % of the tracks9 % of the tracks14 % of the tracks9 % of the tracks17 % of the tracks10 % of the tracks14 % of the tracks6 % of the tracks10 % of the tracks9 % of the tracks3 % of the tracks3 % of the tracks3 % of the tracks3 % of the tracks16 % of the tracks14 % of the tracks20 % of the tracks13 % of the tracks13 % of the tracks9 % of the tracks9 % of the tracks3 % of the tracks3 % of the tracks3 % of the tracksa[0] (input)a[1] (input)a[2] (input)a[3] (input)a[4] (input)a[5] (input)a[6] (input)a[7] (input)acc[0] (output)acc[10] (output)acc[11] (output)acc[12] (output)acc[13] (output)acc[14] (output)acc[15] (output)acc[16] (output)acc[17] (output)acc[18] (output)acc[19] (output)acc[1] (output)acc[2] (output)acc[3] (output)acc[4] (output)acc[5] (output)acc[6] (output)acc[7] (output)acc[8] (output)acc[9] (output)b[0] (input)b[1] (input)b[2] (input)b[3] (input)b[4] (input)b[5] (input)b[6] (input)b[7] (input)clk (input)en (input)rst_n (input)
Measured in OpenROAD · 8-bit MAC · SKY130Explore this layout
Icarus · Verilator · UVM

Simulate SV/UVM

Run SystemVerilog testbenches, read the output and explore waveforms. Use Icarus in your browser or Verilator and UVM on the simulator service.

Open toolYosys

Synthesize (Yosys)

Turn synthesizable RTL into gates with Yosys. Inspect cells, flip-flops and logic levels, then edit your design and measure again.

Open toolngspice

SPICE

Simulate analog circuits with ngspice. Edit a SPICE netlist, plot voltages and currents, and read the measured response.

Open toolOpenSTA · SKY130

Timing (STA)

Edit SDC constraints and a SKY130 gate-level netlist. Inspect setup and hold timing paths with OpenSTA in OpenROAD.

Open tool