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Interview Question · Code Reading
Wildcard Bins
The Question
The interviewer asks
What does this print? How would you change it so every odd value must be seen?
bit [3:0] d;
covergroup cg;
cp: coverpoint d { wildcard bins odd = {4'b???1}; }
endgroup
cg c = new();
initial begin
d = 4'b0001; c.sample();
$display("coverage=%0.2f", c.get_coverage());
endYou have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
It prints coverage=100.00. With the wildcard keyword, each ? bit matches 0 or 1, so the bin collects all eight odd values. It is still one bin, and one hit on any odd value covers it. To need each odd value separately, write wildcard bins odd[] = {4'b???1};. That makes eight bins, and one sample covers 12.5%.
Read the diagram as text
- One sample: d = 4'b0001
- wildcard bins odd = {4'b???1}: One bin for all eight odd values
- wildcard bins odd[] = {4'b???1}: Eight bins, one per odd value
- 100.00%: One hit covers the only bin
- 12.50%: 1 of 8 bins covered
- One sample → wildcard bins odd = {4'b???1}: matches
- One sample → wildcard bins odd[] = {4'b???1}: matches one bin
- wildcard bins odd = {4'b???1} → 100.00%
- wildcard bins odd[] = {4'b???1} → 12.50%
Measured: the twin prints 100.00 and the fixed version prints 12.50. The brackets decide how many bins one line makes.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Fresher)
A good fresher answer says it is one bin, so one hit gives 100%. It then writes the [] form that makes eight bins.
What Interviewers Listen For (Junior)
A good junior answer uses wildcards for bit patterns, such as opcode classes or alignment. It uses ranges for values that sit next to each other.
Cross-Questions
Where the interviewer goes next. Open a node to practise that follow-up.
What IfProve ItCompareScale It
- Wildcard Bins
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CompareWildcard Bins vs Filtered Bin ArraysL1 JuniorL2 Mid-Level
Compare these two ways to cover word-aligned addresses. What does the covergroup print?
systemverilog module tb; bit [7:0] addr; covergroup cg; wild: coverpoint addr { wildcard bins aligned = {8'b??????00}; } each: coverpoint addr { bins aligned[] = {[0:15]} with (item % 4 == 0); } endgroup cg c = new(); initial begin addr = 0; c.sample(); addr = 4; c.sample(); addr = 5; c.sample(); // not aligned: neither coverpoint counts it $display("covergroup=%0.2f (wild 100, each 2 of 4)", c.get_coverage()); end endmodule2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
It prints
covergroup=75.00. The wildcard bin is one bin for every address ending in00, so two aligned samples give 100%. Thewithfilter keeps the aligned values in 0 to 15 and makes one bin each, so two of four are covered. The covergroup averages 100 and 50. Use the wildcard to ask "was any aligned access seen" and the filter when each aligned address matters.RUNVerilator (coverage build) · simulator serviceExpected:covergroup=75.00 (wild 100, each 2 of 4)Self-Check
Tick each key point you covered in your answer.
Misconception
"Both forms build the same bins."
Without
[]the wildcard is one bin. The filter with[]builds one bin per value that passes, which the run shows as 2 of 4.Source IEEE 1800-2017 §19.5.1.1
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Prove ItOpcode Classes Using the Top Two BitsL1 Junior
Prove it: write bins that split an 8-bit opcode into four classes by its top two bits.
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Write one wildcard bin per class, with the top two bits fixed and the rest as
?. For example,wildcard bins alu = {8'b00??????};. After an ALU, a load and a branch opcode, the run reports 75%, because no store was seen.RUNVerilator (coverage build) · simulator serviceExpected:class coverage=75.00 (no store yet)Self-Check
Tick each key point you covered in your answer.
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Scale ItOpcode Coverage for a Whole Instruction SetL2 Mid-LevelL3 Senior
The instruction set has 200 opcodes in a dozen classes. How do you structure the opcode coverage?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Use two levels. A class coverpoint with wildcard bins shows broad progress early. A per-opcode coverpoint, generated from the same table the decoder uses, shows the long tail. Cross the class, not each opcode, with operand corners, or the cross explodes. Generate the bins from the spec table so a new opcode cannot be forgotten.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Senior)
A good senior answer generates the bins from the instruction table, so a new opcode cannot be forgotten. It keeps crosses at the class level and says how many cells that saves.
Wrong Altitude
"Cross every opcode with every operand case; the tool will cope."
Two hundred opcodes times ten operand cases is 2000 cells. Most will stay empty for months and hide the holes that matter.
Source Mehta, SystemVerilog Assertions and Functional Coverage (3rd ed.), §26.20 (PDF p481)
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What IfAn Ignore Bin Inside a Wildcard BinL1 JuniorL2 Mid-Level
What if value 0 must be excluded, but it also matches the wildcard bin for even values? What does this print?
systemverilog module tb; bit [3:0] d; covergroup cg; cp: coverpoint d { wildcard bins even = {4'b???0}; ignore_bins zero = {0}; // 0 matches 'even' too } endgroup cg c = new(); initial begin d = 0; c.sample(); $display("after 0: %0.2f", c.get_coverage()); d = 6; c.sample(); $display("after 6: %0.2f", c.get_coverage()); end endmodule2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
It prints
after 0: 0.00, thenafter 6: 100.00. An ignored value is removed from every bin of the coverpoint, even a bin that also names it. So sampling 0 covers nothing, and theevenbin needs some other even value.RUNVerilator (coverage build) · simulator serviceExpected:after 0: 0.00after 6: 100.00Self-Check
Tick each key point you covered in your answer.
Misconception
"The value counts for whichever bin was declared first."
Declaration order does not matter. Ignore and illegal values are taken out of all the other bins.
Source IEEE 1800-2017 §19.5.5
What People Get Wrong
Common wrong answers and why they fail. Run It shows the wrong belief failing on a real simulator.
Misconception
"A wildcard bin is covered only when every matching value has been seen."
A scalar bin is covered by any one of its values. The twin covers it with 4'b0001 alone; the [] form needs all eight.
Run It
The interview code with one odd sample.
coverage=100.00 after one odd value FAIL: one wildcard bin is covered by a single matching valueSee the Fix
module tb;
bit [3:0] d;
covergroup cg;
cp: coverpoint d { wildcard bins odd[] = {4'b???1}; } // the fix: one bin per odd value
endgroup
cg c = new();
initial begin
d = 4'b0001; c.sample();
$display("coverage=%0.2f after one odd value", c.get_coverage());
if (c.get_coverage() == 100.0) $display("FAIL: one wildcard bin is covered by a single matching value");
else $display("PASS: the array form makes 8 bins, so one odd value covers 1 of 8");
end
endmodule
Prints: coverage=12.50 after one odd value PASS: the array form makes 8 bins, so one odd value covers 1 of 8
Half-Truth
"Wildcard bins are the way to cover a range of values."
A range such as [0:7] says contiguous values more clearly. Wildcards fit bit patterns, where the values are spread out.
Source IEEE 1800-2017 §19.5.4
Buzzword Without Mechanism
"Wildcard means the bin matches any value."
Only the bits written as ?, x or z are free. The other bits must match exactly.
Source Mehta, SystemVerilog Assertions and Functional Coverage (3rd ed.), §26.22 (PDF p490)