ASIC Point Explore

Silicon Lab

Protocols Problems

Build a design, hunt its bugs, or repair what fails. Every answer runs on a real simulator.

Build starts from a specification: make it work, then make it small or fast. Bug Hunt asks for the checker or the test that catches broken designs. Repair hands you a failure: find the cause, then fix the design.

01

On-Chip Interconnect Protocols

Bus basics, then the AMBA buses: AXI, APB and AHB.

66 problems

Protocols · P1 Protocol Fundamentals

  1. P1.3.1 Implement a Sink 1125 Implement Medium Browser
  2. P1.3.2 Catch the Broken Sources 1350 Verify Hard Browser
  3. P1.4.1 Beats into Transactions 750 Implement Easy Browser
  4. P1.5.1 The Throughput That Never Rose 1200 Debug Medium Browser
  5. P1.6.1 The FIFO That Overflowed 1200 Debug Medium Browser
  6. P1.6.2 A Credit Counter 975 Implement Medium Browser
  7. P1.7.1 A Scoreboard Keyed by Tag 1200 Implement Medium Browser
  8. P1.8.1 Fix the Strobe 900 Fix Easy Browser
  9. P1.9.1 A Round-Robin Arbiter Model 975 Implement Medium Browser
  10. P1.10.1 Properties for the Link 1350 Verify Hard Verilator
  11. P1.11.2 Break the Links 1125 Break It Medium Browser
  12. P1.11.3 The Beat That Arrived Late 1200 Debug Medium Browser
  13. P1.11.4 Fix the Sink 975 Fix Medium Browser
  14. P1.11.5 A Monitor for the Link 975 Implement Medium Browser
  15. P1.11.1 Catch Every Broken Link 1425 Verify Hard Browser

Protocols · P2 AXI

  1. P2.2.1 Catch the Broken Managers 1350 Verify Hard Browser
  2. P2.3.1 The Write Dependencies 1350 Verify Hard Browser
  3. P2.4.1 RDATA Not Held 1200 Debug Medium Browser
  4. P2.5.1 An Issuer with N Outstanding 1125 Implement Medium Browser
  5. P2.6.1 The Address of Every Beat 1200 Implement Medium Browser
  6. P2.6.2 The WRAP Boundary 1125 Fix Medium Browser
  7. P2.7.1 The Lane Mapper 1050 Implement Medium Browser
  8. P2.8.1 A Byte-Accurate Write Memory 1425 Implement Hard Browser
  9. P2.9.1 The Strobe Handling 1125 Fix Medium Browser
  10. P2.10.1 The Same-ID Order Checker 1425 Verify Hard Browser
  11. P2.11.1 An ID-Keyed Scoreboard 1200 Implement Medium Browser
  12. P2.12.1 The Stale Read 1350 Debug Medium Browser
  13. P2.13.1 An Exclusive Monitor 1200 Implement Medium Browser
  14. P2.15.1 A Lite Subordinate 1125 Fix Medium Browser
  15. P2.16.1 Six Properties for the Link 1425 Verify Hard Verilator
  16. P2.17.1 The AXI Monitor 1350 Implement Hard UVM
  17. P2.18.2 Break the Subordinates 1275 Break It Medium Browser
  18. P2.18.3 Break the Managers 1275 Break It Medium Browser
  19. P2.18.4 The Beat That Landed in the Wrong Word 1275 Debug Medium Browser
  20. P2.18.5 The Subordinate That Reordered 1275 Fix Medium Browser
  21. P2.18.1 Catch Every Broken Subordinate 1425 Verify Hard Browser
  22. P2.18.6 A Beat-to-Transaction Monitor 1425 Implement Hard Browser

Protocols · P3 APB

  1. P3.2.2 An APB Requester 1275 Implement Medium Browser
  2. P3.2.1 An APB Register Block 1350 Implement Hard Browser
  3. P3.3.1 Stale Read Data 1200 Debug Medium Browser
  4. P3.4.1 The Error on the Wrong Cycle 900 Fix Easy Browser
  5. P3.5.1 The Strobes 900 Fix Easy Browser
  6. P3.6.1 Decoder and Read Mux 975 Implement Medium Browser
  7. P3.7.1 The Bridge's APB Side 1425 Implement Hard Browser
  8. P3.8.1 Properties for the APB Link 1350 Verify Hard Verilator
  9. P3.9.1 The APB Monitor 1200 Implement Medium UVM
  10. P3.9.2 The Register Adapter 1275 Implement Medium UVM
  11. P3.10.2 Break the Completers 1125 Break It Medium Browser
  12. P3.10.3 The FIFO That Lost Entries 1275 Debug Medium Browser
  13. P3.10.1 Catch Every Broken Completer 1425 Verify Hard Browser

Protocols · P4 AHB

  1. P4.2.1 A Zero-Wait AHB Subordinate 1200 Implement Medium Browser
  2. P4.3.1 The Write That Happened on IDLE 1200 Debug Medium Browser
  3. P4.4.1 The Hold Checker 1425 Verify Hard Browser
  4. P4.5.1 A One-Cycle Error 1125 Fix Medium Browser
  5. P4.6.1 The Beat Generator 1200 Implement Medium Browser
  6. P4.6.2 WRAP8 1125 Fix Medium Browser
  7. P4.7.1 Lane Handling 1125 Fix Medium Browser
  8. P4.8.1 The Mux 1275 Fix Medium Browser
  9. P4.8.2 Decoder and Default Subordinate 1125 Implement Medium Browser
  10. P4.9.1 An Exclusive Access Monitor 1350 Implement Hard Browser
  11. P4.10.1 Properties for the AHB Link 1425 Verify Hard Verilator
  12. P4.11.1 The AHB Monitor 1425 Implement Hard UVM
  13. P4.12.2 Break the Subordinates 1275 Break It Medium Browser
  14. P4.12.3 The Read That Returned Its Neighbour's Data 1275 Debug Medium Browser
  15. P4.12.1 Catch Every Broken Subordinate 1425 Verify Hard Browser
  16. P4.12.4 An AHB-to-APB Bridge 1350 Implement Hard Browser
02

Peripheral & Serial Interface Protocols

Serial fundamentals, then UART, SPI and QSPI, I2C and I3C.

63 problems

Module P6 · Protocols · P6 UART

  1. P6.2.1 Encode a UART Frame 825 Implement Easy Browser
  2. P6.3.2 Move the Sample into the Bit 1650 Fix Hard Browser
  3. P6.4.1 A Receiver That Survives the Sweep 1650 Implement Hard Browser
  4. P6.4.2 Locate the First Displaced Sample 1650 Debug Hard Browser
  5. P6.5.1 The Missing Overrun Flag 1200 Fix Medium Browser
  6. P6.5.2 Check UART Errors Without False Alarms 1650 Verify Hard Browser
  7. P6.6.1 RTS and CTS Around a Byte FIFO 1200 Implement Medium Browser
  8. P6.6.2 A Compact UART Voter and Sampler 1650 Optimize Hard Simulation + synthesis
  9. P6.7.1 A UART Monitor That Earns Its Verdict 1650 Verify Hard Browser
  10. P6.7.2 Find Five Faulty UART Receivers 1650 Break It Hard Browser
  11. P6.7.3 Find the Lost Frame After Recovery 1650 Debug Hard Browser

Module P7 · Protocols · P7 SPI and QSPI

  1. P7.1.1 An Eight-Clock SPI Peripheral 825 Implement Easy Browser
  2. P7.2.2 Diagnose the Displaced SPI Reply 1200 Debug Medium Browser
  3. P7.2.1 Check Mode and Edge Discipline 1650 Verify Hard Browser
  4. P7.3.1 Sample MISO After It Becomes Valid 1200 Fix Medium Browser
  5. P7.4.1 Release MISO When Deselected 1200 Fix Medium Browser
  6. P7.4.2 Load Three Devices Through One Chain 1200 Implement Medium Browser
  7. P7.5.1 A Monitor for All Four SPI Modes 1200 Implement Medium Browser
  8. P7.5.2 Prove the SPI Sampling Edge 1650 Verify Hard Verilator
  9. P7.6.1 Decode the Flash Read Phases 1200 Implement Medium Browser
  10. P7.7.1 Release the Quad Lanes at Turnaround 1200 Fix Medium Browser
  11. P7.8.1 WEL and BUSY at a Flash Command Boundary 1200 Implement Medium Browser
  12. P7.8.2 The Program That Crossed a Page 1650 Debug Hard Browser
  13. P7.9.1 Fetch a Wrapped Quad Flash Line 1650 Implement Hard Simulation + synthesis
  14. P7.9.2 A Cache Line in Eighty-Four Clocks 1650 Optimize Hard Browser
  15. P7.10.1 Check the Controller and Its Flash Model 1650 Verify Hard Browser
  16. P7.10.2 Choose Flash Programs That Expose Hidden Faults 1650 Break It Hard Browser
  17. P7.11.1 Complement the Flash Protection Range 1200 Fix Medium Browser
  18. P7.12.1 Keep Suspended Erase Commands Isolated 1200 Fix Medium Browser
  19. P7.13.1 Respect Each Security Register Lock 1200 Fix Medium Browser
  20. P7.14.1 Honor Opcode-Dependent Flash Timing 1200 Fix Medium Browser

Module P8 · Protocols · P8 I2C

  1. P8.1.1 Read the Open-Drain Driver View 825 Implement Easy Browser
  2. P8.2.1 Recognize START STOP and Repeated START 825 Implement Easy Simulation + synthesis
  3. P8.3.1 Receive Eight Bits and Own the Ninth 825 Implement Easy Browser
  4. P8.3.2 The ACK That Outlived Its Slot 1650 Debug Hard Browser
  5. P8.4.2 Seven Address Bits Plus Direction 1200 Fix Medium Browser
  6. P8.4.1 A Register Target with Repeated START 1650 Implement Hard Browser
  7. P8.5.1 Wait for the Stretched Clock 1200 Fix Medium Browser
  8. P8.5.2 Verify a Controller Under Legal Stretching 1200 Verify Medium Browser
  9. P8.6.1 Separate Five Arbitration Failures 1650 Break It Hard Browser
  10. P8.6.2 Prove Arbitration Withdrawal 1650 Verify Hard Verilator
  11. P8.6.3 A Controller That Withdraws on Arbitration Loss 1650 Implement Hard Browser
  12. P8.7.2 Respect Bus-Free and Fm-Plus Timing 1200 Fix Medium Browser
  13. P8.7.1 Measure Logical I2C Timing Without Rejecting a Stretch 1650 Verify Hard Browser
  14. P8.8.1 Recover a Stuck SDA with at Most Nine Clocks 1650 Implement Hard Browser
  15. P8.8.2 Why Nine Recovery Clocks Never Arrived 1650 Debug Hard Browser
  16. P8.10.1 Decode Seven-Bit Ten-Bit and General-Call Traffic 1650 Implement Hard Browser
  17. P8.11.4 Keep a Combined Read on the Busy Bus 1200 Fix Medium Browser
  18. P8.11.1 Verify the Target Across Its Transaction Boundaries 1650 Verify Hard Browser
  19. P8.11.2 A Small Program for Controller and Target Faults 1650 Break It Hard Browser
  20. P8.11.3 Locate the Misread Most-Significant Bit 1650 Debug Hard Browser
  21. P8.11.5 Shrink the Bit Controller Without Losing Stretch State 1650 Optimize Hard Simulation + synthesis
  22. P8.12.1 Send the UFm Ninth Bit High 1200 Fix Medium Browser
  23. P8.13.1 Budget the Clock from Measured Bus Edges 825 Implement Easy Browser

Module P9 · Protocols · P9 I3C

  1. P9.1.1 Keep Legacy and SDR Reads Distinct 1200 Fix Medium Browser
  2. P9.2.1 Write the SDR Odd-Parity T-Bit 1200 Fix Medium Browser
  3. P9.3.1 Release SDA for the Header ACK 1200 Fix Medium Browser
  4. P9.4.1 Withdraw After Losing DAA Arbitration 1200 Fix Medium Browser
  5. P9.5.1 Address a Direct CCC to One Target 1200 Fix Medium Browser
  6. P9.6.1 Send the Mandatory IBI Byte 1200 Fix Medium Browser
  7. P9.7.1 Distinguish HDR Restart from Exit 1200 Fix Medium Browser
  8. P9.8.1 Catch Contention and Legacy Stretching 1200 Verify Medium Browser
  9. P9.9.1 Take SCL Only After the Handoff STOP 1200 Fix Medium Browser
03

High-Speed Interface Protocols

The links that carry data off the chip at speed.

Coming soon