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Interview Question · Code Reading

Display, Strobe and Monitor at the Same Edge

L0 FresherL1 Juniorsystemverilogschedulingdebug

The Question

The interviewer asks

What does this print?

systemverilog
module tb;
  logic clk = 0; int q = 0;
  always @(posedge clk) q <= q + 1;
  initial begin
    $monitor("t=%0t monitor q=%0d", $time, q);
    #5 clk = 1;
    $display("t=%0t display q=%0d", $time, q);
    $strobe("t=%0t strobe  q=%0d", $time, q);
    #5 clk = 0;
    #5 clk = 1;
    #1 $finish;
  end
endmodule
Reveal the Model Answer

At t=5, $display prints q=0, because it runs before the NBA update, while $strobe prints q=1 at the end of the slot. $monitor prints at t=0, t=5 and t=15, each time q has changed by the end of the slot. Use $display for "now", $strobe for the settled value, and $monitor for a change log.

What each display task prints, slot by slot
0123timet=0t=5t=10t=15clkq (end of slot)012$display-q=0-$strobe-q=1-$monitorq=0q=1-q=2$display runs before the NBA update

At t=5 $display prints the old value. $strobe and $monitor print at the end of the slot, after the update. $monitor stays quiet at t=10, because q did not change.

RUNIcarus Verilog · in your browser
Edit the code, then run it
Expected: t=0 monitor q=0 t=5 display q=0 t=5 strobe q=1 t=5 monitor q=1 t=15 monitor q=2

Self-Check

Tick each key point you covered in your answer.

What Interviewers Listen For (Fresher)

A good fresher answer gets display q=0 and strobe q=1 at t=5. It explains why in one sentence.

Cross-Questions

Where the interviewer goes next. Open a node to practise that follow-up.

WhyWhat IfProve ItBreak ItCompare

  1. Display, Strobe and Monitor at the Same Edge
  2. WhyWhy the Postponed Region Is Read-OnlyL1 Junior

    Why may nothing change a value in the Postponed region?

    Reveal the Model Answer

    Postponed exists to report the final values of a time slot. If code there could write a variable, the slot would no longer be final. Then $strobe or $monitor could print values that differ from the real final values. So Postponed is for reading and reporting only.

    Self-Check

    Tick each key point you covered in your answer.

    Misconception

    "You can schedule a <= from a $strobe callback."

    It is illegal to generate new value changes in Postponed; that is the region's defining rule.

    Source IEEE 1800-2017 §4.4.2.9

  3. Break ItDoes Strobe See a Zero-Delay WriteL1 JuniorL2 Mid-Level

    Break it: a value changes through a #0 assignment at the edge. Does $strobe print the new value?

    Reveal the Model Answer

    Yes. A #0 delay moves the write to the Inactive region of the same time step. Postponed comes after Inactive and NBA, so $strobe prints the value after that write. A $display that ran earlier in the Active region printed the old value.

    Self-Check

    Tick each key point you covered in your answer.

    Misconception

    "#0 makes the write land after everything else in the time step."

    Inactive comes before NBA, Observed, Reactive and Postponed. Nonblocking updates and $strobe still come later.

    Source IEEE 1800-2017 §4.4.2.3

  4. CompareMonitor vs Strobe for LoggingL1 JuniorL2 Mid-Level

    Compare $monitor and $strobe as logging tools. What does this print?

    systemverilog
    module tb;
      int a = 0, b = 0;
      initial begin
        $monitor("monitor A: a=%0d", a);
        $monitor("monitor B: b=%0d", b);   // replaces monitor A
        #10 a = 1;
        #10 b = 1;
        #1 $finish;
      end
    endmodule
    
    Reveal the Model Answer

    It prints only monitor B lines: b=0 at t=0 and b=1 at t=20, because a new $monitor call replaces the previous one. $strobe prints once per call, so it suits a log written from a clocked loop, while $monitor suits one quick change log. That one-at-a-time rule is why benches log through their own monitors instead.

    RUNIcarus Verilog · in your browser
    Edit the code, then run it
    Expected: monitor B: b=0 monitor B: b=1

    Self-Check

    Tick each key point you covered in your answer.

    Misconception

    "Each $monitor call adds another watch list."

    Only one monitor list is active; a new call replaces it, as the run shows by never printing monitor A.

    Source IEEE 1800-2017 §21.2.3

  5. What IfDisplay Inside the Block That Writes the FlopL1 Junior

    What if the $display sits inside the clocked block itself, right after q <= q + 1;?

    Reveal the Model Answer

    It still prints the old q. The <= only scheduled the update, so the next statement in the same block reads the pre-edge value. That is useful in RTL debug: the printed value is what the flop held during the cycle that just ended.

    Self-Check

    Tick each key point you covered in your answer.

    Misconception

    "Statements in one block run in order, so the display sees the new value."

    They do run in order, but <= does not update its target when it executes; the update waits for the NBA region.

    Source IEEE 1800-2017 §10.4.2

  6. Prove ItSolve 6.2.1: The Pipeline That Lost a StageSimulator-graded

    Show it, don't just say it: this Silicon Lab problem is graded by the simulator.

    Open Problem 6.2.1

What People Get Wrong

Common wrong answers and why they fail. Run It shows the wrong belief failing on a real simulator.

Misconception

"$display at the edge shows the flop's new value."

It runs in the Active region with the edge's processes, before the NBA update. The twin prints the old count.

Run It

A counter written with <=, printed by $display at the same edge.

RUNIcarus Verilog · in your browser
Edit the code, then run it
Expected: count=0 FAIL: $display ran before the NBA update and printed the old count
See the Fix
module tb;
  logic clk = 0; int count = 0;
  always @(posedge clk) count <= count + 1;
  initial begin
    #5 clk = 1;
    // The fix: $strobe prints at the end of the time step.
    $strobe("count=%0d", count);
    #1 if (count == 1) $display("PASS: $strobe printed the value after the update");
  end
endmodule

Prints: count=1 PASS: $strobe printed the value after the update

Tool as Truth

"$strobe always prints before $monitor."

Both run in Postponed and the standard does not order them. Icarus 12 printed strobe first; Verilator 5.052 printed monitor first for this code.

Source IEEE 1800-2017 §4.4.2.9; measured: line order differs between Icarus 12 and Verilator 5.052

Misconception

"$monitor prints every time the variable is written."

It prints at the end of a time slot in which an argument changed value. Many writes in one slot give at most one line.

Source IEEE 1800-2017 §21.2.3

Learn It, Then Prove It