Use measured rise and fall times to compute the highest integer clock rate for a heavy I2C bus.
Hardware context: Capacitance-heavy I2C bus with passive pull-ups. Include both measured edges in the period budget using wide unsigned arithmetic.
Use measured rise and fall times to compute the highest integer clock rate for a heavy I2C bus.
Signals in the Timeline
| Signal | Width | Role |
|---|---|---|
case_index | 8 | input of each check |
Full specification
Apply UM10204 Rev 7 §7.2.1 Eq. 3: the period includes minimum LOW, minimum HIGH, measured rise and measured fall. Return zero if the sum is zero.
Use a wide sum so four 32-bit inputs cannot overflow. Integer division rounds down, giving a conservative whole-kHz result.
The first six cases use rise/fall measurements from the P8.13 shared ngspice heavy-bus bench, rounded up to nanoseconds. This calculation alone does not validate sink current, thresholds, leakage or a physical board.
Examples
Example 1
c400: LOW 4700 Ns- Input
LOW 4700, HIGH 4000, rise 339, fall 55 ns
- Output
max_khz = 109
The total interval is 9094 ns, giving 109 whole kHz.
Example 2
c400: LOW 1300 Ns- Input
LOW 1300, HIGH 600, rise 339, fall 55 ns
- Output
max_khz = 435
The total interval is 2294 ns, giving 435 whole kHz.
Example 3
c800: LOW 4700 Ns- Input
LOW 4700, HIGH 4000, rise 678, fall 109 ns
- Output
max_khz = 105
The total interval is 9487 ns, giving 105 whole kHz.
Constraints and Contract
- Implement combinational bus_budget. All four inputs are unsigned nanoseconds; max_khz is the floor of one million divided by their sum.
Hints
Hint 1
Add all four times before dividing.
Hint 2
One millisecond contains one million nanoseconds.
Hint 3
Widen the addition before it can overflow.
What the grader checks: The inputs are rounded measurements from the shared P8.13 ngspice bench. This SystemVerilog exercise checks the Eq. 3 arithmetic only; the lesson gates separately rerun the analog measurements.
8 checks on Icarus Verilog · browser. Run the examples first, then check the full regression. The suite is local and inspectable. A passing result establishes the tested cases, not a proof for all possible inputs.
See all 1 steps and the final capstone