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Interview Question · Code Writing
Assertions for a FIFO
- Asked at AMD
The Question
The interviewer asks
Write the assertions you would put on a synchronous FIFO with push, pop, full, empty and a fill level. What helper logic do you need?
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Reveal the Model Answer
Keep a small model of the fill level in the checker, updated as level + push - pop on each accepted operation. Then assert four rules. No accepted push when full. No accepted pop when empty. full equals level at depth, and empty equals level at zero. Add covers for full, empty, and push with pop on the same cycle.
Read the diagram as text
- Stimulus: one operation per clock
- hardware_fifo: DEPTH 3
- Auxiliary model: n, q, exp_data
- Rules: flags_match, answered, in_order, ...
- Fail counters: one per rule
- Stimulus → hardware_fifo: drives
- Stimulus → Auxiliary model: same ports
- hardware_fifo → Rules: outputs
- Auxiliary model → Rules: n, take_r, exp_data
- Rules → Fail counters: else f_x++
The model decides acceptance from its own count, never from the FIFO's internals.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Junior)
A good junior answer lists the overflow, underflow and flag rules. It models the fill level with a small counter.
What Interviewers Listen For (Mid-Level)
A good mid-level answer handles a push and a pop in the same cycle in the model. It adds a cover for exactly that case.
What Interviewers Listen For (Senior)
A good senior answer leaves data ordering to a scoreboard or a formal tracking property. It explains why checking every entry with assertions is expensive.
Cross-Questions
Where the interviewer goes next. Open a node to practise that follow-up.
WhyWhat IfProve ItCompare
- Assertions for a FIFO
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WhyWhy Some Assertions Need Helper LogicL1 JuniorL2 Mid-Level
Why not write the FIFO rules with sequences alone, without a counter?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
The fill level depends on the whole history of pushes and pops. A sequence can only look at a bounded window of cycles. A small counter keeps that history in one number, so each property stays short and checks only the current cycle.
Self-Check
Tick each key point you covered in your answer.
Misconception
"Helper logic in a checker is cheating; real SVA uses only properties."
Auxiliary code is normal practice. It keeps properties simple and fast, which matters most in formal.
Source Mehta, SystemVerilog Assertions and Functional Coverage (3rd ed.), §17.7
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WhyWhy the Property Sees the Old CountL1 JuniorL2 Mid-Level
Why does the property see the fill count from before this edge's push?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
Assertions use sampled values, taken before any flop updates at the edge. So the property sees the count after the previous edge, not after this push. Write the rules with that in mind: a push while the old count is full is an error now. A counter updated with
<=matches the DUT's own timing.Self-Check
Tick each key point you covered in your answer.
Misconception
"Update the checker counter with
=so the property sees the new value."The property reads sampled values from before the edge, whatever the assignment type. A blocking update only adds a race.
Source IEEE 1800-2017 §16.5.1
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CompareFIFO Assertions vs a ScoreboardL2 Mid-Level
Compare checking a FIFO with assertions and with a testbench scoreboard. Do you need both?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Assertions check the control rules in the cycle where they break, and point straight at the cycle. A scoreboard checks that the data comes out in the right order and with the right values. Use both. The flags and limits suit assertions, and data ordering suits the scoreboard.
Assertions Scoreboard Checks Control rules: overflow, underflow, flags Data order and values Reports The exact cycle where a rule breaks A mismatch when the data comes out Also runs in formal Yes No Each one is cheap where the other is expensive, so a FIFO bench uses both.
Self-Check
Tick each key point you covered in your answer.
Half-Truth
"The scoreboard would catch a wrong flag anyway."
A flag that is wrong for one cycle may never cause wrong data in that test. The assertion catches it when it happens.
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Prove ItSolve 7.1.6: Requests That Expose Broken FIFO RulesSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
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What IfAdding an Almost-Full FlagL2 Mid-Level
Asked if they mention almost-full
What if the FIFO also has
almost_full, set when the level is at least depth minus 2?2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Add one rule against the same model:
almost_full == (level >= DEPTH - 2). Then cover the two corners: the cycle it rises and the cycle it falls. The model already exists, so each new flag costs one line.Self-Check
Tick each key point you covered in your answer.
Missed Corner
"Assert that almost_full rises two cycles before full."
That depends on the traffic. With pops in between, full may never come. Compare the flag with the level, not with time.
Source Lesson 7.1 (start from the FIFO rules)
What People Get Wrong
Common wrong answers and why they fail. Run It shows the wrong belief failing on a real simulator.
Missed Corner
"A cycle has a push or a pop, so if (push) ... else if (pop) models the level."
A FIFO can push and pop in one cycle. The twin's model skips the pop, drifts by one, and fails a correct DUT.
Run It
A level model with if/else-if, compared with a correct DUT level.
level check failures=3 FAIL: the model ignored the pop in the cycle with both push and popSee the Fix
module tb;
logic clk = 0, push = 0, pop = 0;
int dut_level = 0; // the DUT's fill level (correct)
int model_level = 0; // the checker's model
int fails = 0;
always #5 clk = ~clk;
always @(posedge clk) dut_level <= dut_level + push - pop;
// The fix: apply both operations in the same cycle.
always @(posedge clk) model_level <= model_level + push - pop;
a_level: assert property (@(posedge clk) dut_level == model_level) else fails++;
initial begin
@(negedge clk) push = 1; // level 1
@(negedge clk) push = 1; // level 2
@(negedge clk) begin push = 1; pop = 1; end // push and pop together: level stays 2
@(negedge clk) begin push = 0; pop = 1; end // level 1
@(negedge clk) pop = 0;
repeat (2) @(negedge clk);
$display("level check failures=%0d", fails);
if (!fails) $display("PASS: the model tracks a simultaneous push and pop");
$finish;
end
endmodule
Prints: level check failures=0 PASS: the model tracks a simultaneous push and pop
Wrong Altitude
"Check the data order with assertions too: one property per entry."
It works for tiny FIFOs, but the property count grows with depth. A scoreboard, or one tracked entry in formal, is cheaper.
Half-Truth
"full and empty can never both be true, so that is the main check."
It is a true rule, but weak. It passes a FIFO whose flags are wrong by one entry. Compare each flag with the modelled level instead.