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Designing a Block Environment for Reuse

L3 Senioruvmreusearchitecture

The Question

The interviewer asks

Your block environment will be reused in the subsystem bench and on the next chip. What do you design in from day one?

Reveal the Model Answer

Vertical reuse puts the block environment inside a bigger one; horizontal reuse moves it to another project. For both, each agent takes a config object with is_active, and nothing reaches for global signals or the test's handles. The register model accepts a parent block and a base address. Scoreboards take inputs only from monitors, so they still work when agents turn passive.

The Same Block Environment, Twice, in a Subsystem BenchBlock B's input is now block A's output. Arrows into a bus are driving; arrows out of a bus are observing.
The same block environment, twice, in a subsystem benchBlock B's input is now block A's output. Arrows into a bus are driving; arrows out of a bus are observing. test sub_test_base Builds sub_env_cfgonce env sub env Passes each block itscfg; compares Aoutputs with B inputs block env blk_a env(active) drv, sqr, mon, pred,cmp block env blk_b env(passive) mon, pred, cmp; nodriver interface ext bus tb.ext, at thesubsystem pins design Block A RTL Shows y = x + 1 interface mid bus tb.dut.mid, internal cfgcfg.blk_acfg.blk_bdrivesxresult is B inputobserved
  1. Configure

    The test fills one sub_env_cfg. The sub env hands cfg.blk_a to blk_a and cfg.blk_b to blk_b; block B's agent config says UVM_PASSIVE.

    Follow the calls, values and waits
    1. data sub_env_cfg: sub_test_base → sub env
    2. data cfg.blk_a: sub env → blk_a env (active)
    3. data cfg.blk_b (passive agent): sub env → blk_b env (passive)
  2. Drive A15 ns (illustrative)

    Only block A's driver touches pins. It puts 16 on ext and the design takes it at 15 ns.

    Follow the calls, values and waits
    1. data x = 16: blk_a env (active) → ext bus
    2. data x = 16: ext bus → Block A RTL
  3. Cross35 ns (illustrative)

    Block A shows 17 on its result pins. Inside the subsystem that result is block B's input, taken at 35 ns.

    Follow the calls, values and waits
    1. data A result 17 = B input: Block A RTL → mid bus
  4. Observe B's input35 ns (illustrative)

    Block B's monitor watches mid and feeds its own predictor and comparator, unchanged from the block bench.

    Follow the calls, values and waits
    1. data A result 17 = B input: mid bus → blk_b env (passive)
    2. Waiting: blk_b env (passive) — expects 18 from block B
  5. Check B55 ns (illustrative)

    B's result, 18, is checked at 55 ns.

    Follow the calls, values and waits
    1. Released: blk_b env (passive)
Read the diagram as text
  • sub_test_base: Builds sub_env_cfg once
  • sub env: Passes each block its cfg; compares A outputs with B inputs
  • blk_a env (active): drv, sqr, mon, pred, cmp
  • blk_b env (passive): mon, pred, cmp; no driver
  • ext bus: tb.ext, at the subsystem pins
  • Block A RTL: Shows y = x + 1
  • mid bus: tb.dut.mid, internal
  • sub_test_base → sub env: cfg
  • sub env → blk_a env (active): cfg.blk_a
  • sub env → blk_b env (passive): cfg.blk_b
  • blk_a env (active) → ext bus: drives
  • ext bus → Block A RTL: x
  • Block A RTL → mid bus: result is B input
  • mid bus → blk_b env (passive): observed

Two copies of one environment class. What changed is one config field and where the virtual interface points.

Self-Check

Tick each key point you covered in your answer.

What Interviewers Listen For (Senior)

A good senior answer lists the reuse hooks before writing code. They are config objects, passive mode, a register model with a parent, and no global handles. It then names one reuse that failed, and why.

Cross-Questions

Where the interviewer goes next. Open a node to practise that follow-up.

What IfProve ItBreak ItCompareScale It

  1. Designing a Block Environment for Reuse
  2. CompareWhat Breaks in Vertical vs Horizontal ReuseL3 Senior

    Compare what breaks in vertical reuse with what breaks in horizontal reuse.

    Reveal the Model Answer

    Vertical reuse breaks on assumptions about being at the top. The environment drives pins that are now internal, or owns the register model. Horizontal reuse breaks on assumptions about the design: fixed widths, depths or protocol options. Parameters and config objects fix the second kind. Passive mode and a parent register block fix the first.

    Self-Check

    Tick each key point you covered in your answer.

  3. What IfA Scoreboard Fed by the DriverL3 Senior

    What if the block scoreboard took its expected stream from the driver?

    Reveal the Model Answer

    In the subsystem the block's driver is gone, because real RTL drives that interface. The scoreboard gets no inputs and quietly checks nothing. Build the expected stream from the input monitor instead, so the same scoreboard works in active and passive mode.

    Self-Check

    Tick each key point you covered in your answer.

  4. Break ItProving a Reused Scoreboard Is CheckingL3 Senior

    How do you make sure a reused scoreboard is really checking something?

    Reveal the Model Answer

    Count what it compared, and fail the test if the count is zero or below a set minimum. Print the count for each instance in the summary. A scoreboard that checks nothing must fail loudly, not pass quietly.

    Self-Check

    Tick each key point you covered in your answer.

  5. Scale ItReuse Rules for Many Block TeamsL4 Staff

    Scale it: ten block teams feed one SoC bench. What rules do you set?

    Reveal the Model Answer

    One config object per agent, one analysis port per observed interface, and no hierarchical references into other components. Register models are generated from one source. Each team delivers its environment with a passive-mode test that runs at block level. Integration then wires environments together; it never edits them.

    Self-Check

    Tick each key point you covered in your answer.

    What Interviewers Listen For (Staff)

    A good staff answer sets acceptance tests for each delivered environment, such as a passive-mode smoke test. It does not just trust a style guide.

  6. Prove ItSolve U3.2.1: Two Environments That Never TalkSimulator-graded

    Show it, don't just say it: this Silicon Lab problem is graded by the simulator.

    Open Problem U3.2.1

What People Get Wrong

Common wrong answers and why they fail.

Buzzword Without Mechanism

"UVM components are reusable by design."

UVM gives the hooks; the bench still has to use them. An environment that reads uvm_test_top paths or drives pins from a checker breaks at the next level.

Wrong Altitude

"Copy the block environment and edit it for the subsystem."

Two copies drift apart, and fixes in one never reach the other. Reuse means the same code, configured differently.

Missed Corner

"The register model works unchanged in the subsystem."

Its base address changes, and other masters can now write it. Without a parent offset and explicit prediction, checks fail or go stale.

Source Verification Academy, UVM Cookbook, Registers: explicit prediction supports vertical reuse (PDF p330)

Learn It, Then Prove It