← Protocols Interviews

Interview Question · Concept

I3C Dynamic Address Assignment

L2 Mid-Leveli3cdaaarbitration

The Question

The interviewer asks

Explain how ENTDAA gives every I3C target an address. What decides the order, and what does a target that loses a round do?

Reveal the Model Answer

The controller broadcasts ENTDAA, then runs rounds of Sr (repeated START) with 7E/R. Every target without an address ACKs and sends its 48-bit provisional ID, then BCR and DCR. These bits go out in open drain, with no ACKs in between. The lowest 64-bit value wins and gets a 7-bit address plus odd parity, which it ACKs. A loser stops driving and competes again in the next round. A round that nobody ACKs ends DAA.

One ENTDAA RoundThe controller repeats the round until nobody answers 7E/R.
One ENTDAA roundThe controller repeats the round until nobody answers 7E/R. component S 7E/W, ENTDAA broadcast CCC 0x07 component Sr 7E/R unassigned targetsACK component 64 bits PID, BCR, DCR, opendrain component address + PAR controller, odd parity component ACK the winner keeps theaddress component P after a NACKed 7E/R next roundno ACK
  1. Enter

    ENTDAA is a broadcast CCC with no data; targets that already have an address stay out (MIPI §5.1.9.3.4).

  2. Arbitrate

    Each target sends its 48-bit provisional ID, then BCR and DCR, most significant bit first, with no ACK in between (§5.1.4.2 steps 6 and 7).

  3. Assign

    Seven address bits plus PAR = NOT XOR of the seven; the winner ACKs if the parity checks (step 9).

  4. Repeat or stop

    Back to Sr 7E/R; when nobody ACKs, STOP ends DAA (steps 10 and 11).

Read the diagram as text
  • S 7E/W, ENTDAA: broadcast CCC 0x07
  • Sr 7E/R: unassigned targets ACK
  • 64 bits: PID, BCR, DCR, open drain
  • address + PAR: controller, odd parity
  • ACK: the winner keeps the address
  • P: after a NACKed 7E/R
  • S 7E/W, ENTDAA → Sr 7E/R
  • Sr 7E/R → 64 bits
  • 64 bits → address + PAR
  • address + PAR → ACK
  • ACK → Sr 7E/R: next round
  • Sr 7E/R → P: no ACK

MIPI I3C Basic v1.0 §5.1.4.2 and Figure 19. The whole procedure is open drain; the Sr and 7E/R may be push-pull.

Two Targets Send Their IDs; One Drops OutMeasured, 20 ns per column: bits 33 to 38 of the first DAA round. The provisional IDs differ only in bit 12, the lowest bit of the instance ID.
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172SCLSDActrl_lowtgt1_lowtgt2_low
  1. Cycle 10

    Both IDs have a 0 here: both targets pull, open drain. The controller only clocks.

  2. Cycle 34

    PID bit 12: target1 sends 0, target2 sends 1 and lets go. It samples 0 at the rise: it has lost (MIPI §5.1.4.2 step 8).

  3. Cycle 46

    From here target2 stays silent for the rest of the round, even where its own ID has a 0.

Measured: the round ends with CTRL DAA PID 02aa01230000 BCR 06 DCR 00 -> 08. The lowest 64-bit value wins, exactly as a 0 wins I2C arbitration (UM10204 §3.1.8).

RUNIcarus Verilog · in your browser
Edit the code, then run it
Expected: PID 02aa01230000 BCR 06 DCR 00 -> 08, taken by 1 target(s) PID 02aa01231000 BCR 06 DCR 00 -> 09, taken by 1 target(s) PID 02aa01232000 BCR 06 DCR 00 -> 0a, taken by 1 target(s) assigned 3 of 3 expected addresses PASS: every target has its own address

Self-Check

Tick each key point you covered in your answer.

What Interviewers Listen For (Mid-Level)

A good mid-level answer gives the structure of a round and the 64-bit arbitration where the lowest value wins. It says the winner checks the parity before it ACKs its address.

Cross-Questions

Where the interviewer goes next. Open a node to practise that follow-up.

WhyWhat IfProve ItBreak ItCompare

  1. I3C Dynamic Address Assignment
  2. WhyWhy the Address Order MattersL2 Mid-Level

    Does it matter which dynamic address each target gets?

    Reveal the Model Answer

    Yes. In I3C a lower address means higher priority. Several targets may raise an in-band interrupt after the same START. The lowest address then wins the header arbitration, because 0 bits win on the wire. So the controller should give low addresses to targets with urgent interrupts. It can reassign addresses later with SETNEWDA or RSTDAA.

    Self-Check

    Tick each key point you covered in your answer.

    What Interviewers Listen For (Mid-Level)

    A good mid-level answer links a lower address to higher interrupt priority, because 0 bits win the open-drain header.

  3. Break ItTwo Targets, One Dynamic AddressL2 Mid-LevelL3 Senior

    After DAA, reads from one address return x and the checker flags contention. How can two targets end up with the same address, and how should the controller catch it?

    log
    Illustrative post-DAA debug excerpt
    Controller accepted address assignment
    Read at assigned address: resolved data includes X
    Checker: two targets drive conflicting data
    Reveal the Model Answer

    Either two targets sent identical ID, BCR and DCR, or one target kept driving after it lost. Both then ACK the same address. The controller knows how many devices need an address. It must compare that number with the count actually assigned, and fewer means a collision. It then resets the duplicate with RSTDAA (direct or broadcast) and runs DAA again.

    Self-Check

    Tick each key point you covered in your answer.

    What Interviewers Listen For (Mid-Level)

    A good mid-level answer names both causes: identical IDs, or a loser that kept driving. It adds a check that the count of assigned addresses matches the device count.

  4. WhyWhy Two Provisional IDs Can MatchL2 Mid-LevelL3 Senior

    Why can two targets send the same provisional ID at all?

    Reveal the Model Answer

    With a vendor-fixed ID, two copies of one part share the maker and part bits. Only the 4-bit instance ID tells them apart. The system designer sets it, for example with straps or fuses. If two boards strap the same value, the IDs tie, so the controller must check after DAA.

    Self-Check

    Tick each key point you covered in your answer.

    Spec Misquote

    "Provisional IDs are unique by design, so collisions cannot happen."

    The spec warns that identical IDs and DCRs get the same address. The controller must test for it after assignment.

    Source MIPI I3C Basic v1.0 §5.1.4.3 Provisional ID Collision Detection and Correction

  5. What IfA NACK During DAAL2 Mid-Level

    The winning target NACKs the address the controller assigns. What happens next?

    Reveal the Model Answer

    The target NACKs when the parity bit is wrong. The controller moves on to the next round, and the same target wins again with the same ID. If it NACKs a second time, the controller must leave DAA. It then runs an error procedure that the system designer defines. So a target with a broken parity check blocks every target behind it.

    Self-Check

    Tick each key point you covered in your answer.

    What Interviewers Listen For (Mid-Level)

    A good mid-level answer knows the controller retries the round once and then leaves DAA with an error.

  6. CompareSETDASA and SETAASA Versus ENTDAAL2 Mid-Level

    Is ENTDAA the only way a target gets a dynamic address?

    Reveal the Model Answer

    No. With SETDASA, the controller gives one target at a time a dynamic address, using its known static address. SETAASA does it for all supporting targets at once, with no arbitration: each static address becomes the dynamic one. ENTDAA then handles targets that have only a provisional ID. In a mixed system, the controller sends SETAASA before ENTDAA.

    Self-Check

    Tick each key point you covered in your answer.

    What Interviewers Listen For (Mid-Level)

    A good mid-level answer names both commands and says when each one fits.

  7. Prove ItSolve P9.4.1: Withdraw After Losing DAA ArbitrationSimulator-graded

    Show it, don't just say it: this Silicon Lab problem is graded by the simulator.

    Open Problem P9.4.1

What People Get Wrong

Common wrong answers and why they fail. Run It shows the wrong belief failing on a real simulator.

Misconception

"Arbitration guarantees every target a unique address."

Two targets with identical ID, BCR and DCR never see a difference. So both survive, and both take the same address. The twin shows the result: the count is one address short. Only a controller that counts can notice.

Run It
RUNIcarus Verilog · in your browser
Edit the code, then run it
Expected: PID 02aa01230000 BCR 06 DCR 00 -> 08, taken by 2 target(s) PID 02aa01232000 BCR 06 DCR 00 -> 09, taken by 1 target(s) assigned 2 of 3 expected addresses FAIL: 3 targets but 2 addresses, so two targets share one
See the Fix
// ENTDAA arbitration, bit-accurate but untimed. Each target without an address sends its 48-bit
// provisional ID, then BCR and DCR, MSB first, in open drain: SDA is the AND of all senders. A
// target that sends a 1 and reads a 0 has lost and stops. The survivor takes the next address.
module tb;
  logic [63:0] id [3];
  bit has_da [3];
  task automatic entdaa(input int n, input int expected);
    int assigned = 0;
    logic [6:0] da = 7'h08;
    bit more = 1;
    while (more) begin
      bit live [3];
      int nlive = 0, w = -1;
      for (int i = 0; i < n; i++) live[i] = !has_da[i];
      for (int b = 63; b >= 0; b--) begin
        logic sda = 1;
        for (int i = 0; i < n; i++) if (live[i] && !id[i][b]) sda = 0;
        for (int i = 0; i < n; i++) if (live[i] && id[i][b] && !sda) live[i] = 0;
      end
      for (int i = 0; i < n; i++) if (live[i]) begin nlive++; w = i; has_da[i] = 1; end
      if (nlive == 0) more = 0;          // nobody ACKs 7E/R: the procedure ends
      else begin
        $display("PID %h BCR %h DCR %h -> %h, taken by %0d target(s)", id[w][63:16], id[w][15:8], id[w][7:0], da, nlive);
        assigned++; da++;
      end
    end
    $display("assigned %0d of %0d expected addresses", assigned, expected);
    if (assigned == expected) $display("PASS: every target has its own address");
    else $display("FAIL: %0d targets but %0d addresses, so two targets share one", expected, assigned);
  endtask
  initial begin
    id[0] = {48'h02aa01232000, 8'h06, 8'h00};
    id[1] = {48'h02aa01230000, 8'h06, 8'h00};
    id[2] = {48'h02aa01231000, 8'h06, 8'h00};
    entdaa(3, 3);
    $finish;
  end
endmodule

Prints: PID 02aa01230000 BCR 06 DCR 00 -> 08, taken by 1 target(s) PID 02aa01231000 BCR 06 DCR 00 -> 09, taken by 1 target(s) PID 02aa01232000 BCR 06 DCR 00 -> 0a, taken by 1 target(s) assigned 3 of 3 expected addresses PASS: every target has its own address

Spec Misquote

"The highest ID wins, like a priority number."

Arbitration is open drain: a 0 pulls the line low and beats a 1. So the lowest concatenated value wins each round.

Source MIPI I3C Basic v1.0 §5.1.4.2 step 8

Missed Corner

"The provisional ID is fully random, so collisions cannot happen."

The 48-bit ID is usually a manufacturer ID, a part ID and a 4-bit instance ID. Straps or fuses set the instance ID. Two identical parts strapped the same way collide. Bit 32 selects a random ID only when the vendor chose that.

Source MIPI I3C Basic v1.0 §5.1.4.1.1 Unique Identifiability

Learn It, Then Prove It