← Analog & Mixed-Signal Interviews
Interview Question · Code Reading
A Current Mirror's Output vs Its Output Voltage
- Likely at Synopsys
The Question
The interviewer asks
This bench copies 20 µA with a simple NMOS mirror and sweeps the output voltage. Does the output current stay at 20 µA? Where is the copy exact?
I1 vdd g 20u
VDD vdd 0 1.8
XR g g 0 0 sky130_fd_pr__nfet_01v8 W=2 L=0.15
VO o 0 0.9
VA o o1 0
XO o1 g 0 0 sky130_fd_pr__nfet_01v8 W=2 L=0.15
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Reveal the Model Answer
No. The copy is exact only when the output voltage equals the gate voltage, because then both devices see the same V_DS. Elsewhere channel-length modulation changes the current. With 2/0.15 µm devices the output is 21.8 µA at 0.9 V and 11.5 µA at 0.2 V, where the device leaves saturation. The output resistance, here 70.7 kΩ, is the slope that sets this error.
- Output voltage VO 500 mVi_015 = 16.11 µA
At 0.5 V on the output the copy is 16.1 µA, 19 % low.
- Output voltage VO 1.8 Vi_015 = 34.41 µA
At 1.8 V it is 34.4 µA, 72 % high. Nothing in the reference changed; only the output voltage did.
Read the plot as a table
| Output voltage VO | i_015 |
|---|---|
| 0 V | 0.0000009927 fA |
| 200 mV | 11.54 µA |
| 400 mV | 14.64 µA |
| 500 mV | 16.11 µA |
| 600 mV | 17.55 µA |
| 800 mV | 20.41 µA |
| 1 V | 23.24 µA |
| 1.2 V | 26.05 µA |
| 1.4 V | 28.85 µA |
| 1.6 V | 31.63 µA |
| 1.8 V | 34.41 µA |
The 2/0.15 µm mirror of this question. The reference stays at 20 µA, yet the copy moves with the output voltage.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Fresher)
A good fresher answer says the output device must stay in saturation. It says the copy changes with V_out because of channel-length modulation.
What Interviewers Listen For (Mid-Level)
A good mid-level answer finds the exact point at V_out = V_GS, and reads r_out from the slope. It picks the length from the error and headroom budget.
Cross-Questions
Where the interviewer goes next. Open a node to practise that follow-up.
WhyWhat IfProve ItCompare
- A Current Mirror's Output vs Its Output Voltage
-
WhyWhere a Mirror Copies ExactlyL0 FresherL1 Junior
Why is a simple mirror exact only when its output voltage equals its gate voltage?
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Reveal the Model Answer
The reference device is diode-connected, so its V_DS equals V_GS. The output device has the same V_GS. When its drain also sits at V_GS, the two devices are in the same state and carry the same current. The lesson checked this: the 8/1 µm mirror gives exactly 20 µA at 0.714 V.
A Simple NMOS Current MirrorIREF flows into the diode-connected M1. M2 shares its gate and copies the current into the output node. Whole circuit- The reference sets VGS
IREF pushes 20 µA into M1. M1's gate is tied to its drain, so it settles at the gate voltage that carries 20 µA: VGS = 0.714 V for W/L = 8/1 µm.
IREF = 20 µA
- M2 gets the same VGS
M2's gate is on the same node and both sources are at ground. A saturated transistor's current is set mainly by VGS, so M2 carries about the same 20 µA.
- The output current
VO holds M2's drain at 0.9 V while M1's drain sits at 0.714 V. M2 carries 20.27 µA, 1.3 % more than the reference. The current leaves VO's + terminal, so SPICE prints i(VO) as a negative number.
20.27 µA
Read the circuit as text
- IREF current source (20 µA): + →
VDD, − →g - M1 NMOS transistor (W/L = 8/1): gate →
g, drain →g, source →0 - M2 NMOS transistor (W/L = 8/1): gate →
g, drain →o, source →0 - VO voltage source (0.9 V): + →
o, − →0
g= 0.714 Vo= 0.900 V
The simple mirror of lesson E4.1, drawn with its operating point. M1's drain sits at its own VGS.
Self-Check
Tick each key point you covered in your answer.
- The reference sets VGS
-
Prove ItSolve E4.2.1: One Reference, Two CurrentsSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
-
What IfA Mirror Output Above Its Gate VoltageL1 Junior
What if the mirror output sits 0.5 V above V_GS? Which way does the copy move, and what sets how much?
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Reveal the Model Answer
The copy rises above the reference, because channel-length modulation adds current as V_DS grows. The error is about ΔV divided by V_A, the Early voltage. A short device has a small V_A, so its error is large. A longer device or a cascode makes it small.
Self-Check
Tick each key point you covered in your answer.
Misconception
"Match the two devices well and the copy is exact at any output voltage."
Matching fixes the devices, not their V_DS. With different drain voltages, channel-length modulation gives them different currents.
Source Lesson E4.1 key points
-
CompareSimple Mirror vs Cascode MirrorL1 JuniorL2 Mid-Level
Compare a simple mirror with a cascode mirror.
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
A cascode device on top raises the output resistance by about (g_m + g_mb)·r_o. In the lesson it went from 0.80 MΩ to 102 MΩ. The price is headroom: the output now needs about V_GS + V_Dsat, around 0.85 V. A wide-swing version gets most of the gain back while the output can fall to about 0.3 V.
Self-Check
Tick each key point you covered in your answer.
-
What IfRouting a Bias Voltage vs Routing a CurrentL1 JuniorL2 Mid-Level
Asked if they share one bias voltage across the chip
What if you route one mirror gate voltage across the chip to bias many blocks?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
The ground at each block is a little different, because supply current flows through the metal. The copy changes by about (g_m/I_D)·ΔV for a ground difference ΔV. Here g_m/I_D is the transconductance per unit of drain current. So send a current to each block and mirror it locally instead. A current does not care about the ground voltage on the way.
DC sweepA Far Sink Against the Offset of Its GroundThe far sink on a routed gate voltage (i_far), its first-order estimate (i_lin), and a routed current mirrored by the far block (i_loc). Whole plot- i_far
- i_lin
- i_loc
- Far ground offset VGR 0 Vi_far = 10.15 µA · i_lin = 10.15 µA · i_loc = 9.946 µA
With both grounds equal, the routed gate voltage gives 10.15 µA and the locally mirrored current 9.95 µA.
- Far ground offset VGR 10 mVi_far = 8.641 µA · i_lin = 8.863 µA · i_loc = 9.933 µA
At 10 mV the routed voltage gives 8.64 µA (−14.9 %); the estimate (gm/ID)·ΔV predicts 8.86 µA. The local mirror gives 9.93 µA (−0.13 %).
- Far ground offset VGR 20 mVi_far = 7.287 µA · i_lin = 7.576 µA · i_loc = 9.921 µA
At 20 mV the routed voltage has lost more than a quarter of its current. The local mirror has barely moved.
Read the plot as a table
Far ground offset VGR i_far i_lin i_loc 0 V 10.15 µA 10.15 µA 9.946 µA 5 mV 9.376 µA 9.507 µA 9.94 µA 10 mV 8.641 µA 8.863 µA 9.933 µA 15 mV 7.945 µA 8.22 µA 9.927 µA 20 mV 7.287 µA 7.576 µA 9.921 µA A far block on a routed gate voltage loses current as its ground shifts. A routed current, mirrored locally, barely moves.
Self-Check
Tick each key point you covered in your answer.
-
Prove ItSolve E4.1.1: The Mirror That OvershootsSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
What People Get Wrong
Common wrong answers and why they fail. Run It shows the wrong belief failing on a real simulator.
Misconception
"A mirror copies the reference current exactly as long as the devices match."
Matching is not enough. The output device sees a different V_DS. At 0.9 V the short mirror gives 21.8 µA, a 9 % error. The 8/1 µm mirror gives 20.3 µA.
Run It
A simple mirror built from 2/0.15 µm devices, copying 20 µA, with the output held at 0.2 V and 0.9 V.
Run the netlist to draw its plots here.
i_02 = 1.154243e-05 i_09 = 2.182895e-05 ro = 7.067227e+04 vgs = 7.710838e-01See the Fix
* simple NMOS mirror copying 20 uA, W = 8, L = 1
.lib sky130 tt
I1 vdd g 20u
VDD vdd 0 1.8
XR g g 0 0 sky130_fd_pr__nfet_01v8 W=8 L=1
VO o 0 0.9
VA o o1 0
XO o1 g 0 0 sky130_fd_pr__nfet_01v8 W=8 L=1
.control
dc VO 0 1.8 0.005
let iout=i(VA)
let rout=1/deriv(iout)
meas dc i_02 FIND iout AT=0.2
meas dc i_09 FIND iout AT=0.9
meas dc ro FIND rout AT=0.9
meas dc vgs FIND v(g) AT=0.9
.endc
.end
Prints: i_02 = 1.863838e-05 i_09 = 2.026702e-05 ro = 7.310250e+05 vgs = 7.135415e-01
Missed Corner
"The output works down to V_Dsat, about 0.1 V."
The V_Dsat rule flatters the mirror. At 0.2 V the short mirror already gives only 11.5 µA. The lesson measures the minimum output voltage where the current is 1 % low.
Source ASIC Point lesson E4.1 (measured)