Devices Interview Questions

Below threshold the device is in weak inversion: current is small but not zero, and exponential in the gate voltage. Above threshold with a small drain voltage it is in triode, a resistor whose value the gate sets. Once the drain voltage passes the saturation voltage, the device is in saturation. There the current depends mainly on the gate voltage and only weakly on the drain. Amplifiers bias their devices in saturation.

Modern processes add halo implants, extra doping near the source and drain, to fight short-channel effects. In a short device the halos cover a larger share of the channel and raise its doping. So the threshold goes up: a reverse short-channel effect. At high drain voltage, drain-induced barrier lowering pulls it back down.

In saturation the current barely changes with the drain voltage. The device acts like a current source with a large output resistance, so gain is g_m times a large resistance. In triode the drain voltage strongly sets the current, so the output resistance collapses and so does the gain. Triode is what you want in a switch, not an amplifier.

Below threshold the current is diffusion over a barrier, so it is exponential in V_GS. The subthreshold swing, n·U_T·ln 10, is the gate voltage per decade of current. It is 59.6 mV at best at 27 °C and about 94 mV for this sky130 NMOS. The off current is the current at V_GS = 0; it grows with temperature and drain voltage. In SPICE, lower gmin first, because its default conductance adds about 1.8 pA at 1.8 V.

Below threshold carriers cross the source barrier by thermal diffusion, so the current follows the Boltzmann factor, exp(qV/kT). The gate controls the barrier only through a capacitive divider, which the slope factor n ≥ 1 describes. One decade therefore needs at least ln 10 · kT/q, about 59.6 mV at 27 °C, and more by the factor n.

Temperature raises it by orders of magnitude, because the threshold falls and the swing widens. On this device the swing goes from 73 to 125 mV per decade between -40 °C and 125 °C. Drain voltage raises it through barrier lowering, about tenfold from 0.1 V to 1.8 V here. Standby power is therefore quoted at the hot corner and full supply.

Ask for every specification line with its measured margin at every corner, crossed with supply and temperature. Ask for Monte Carlo mean plus or minus 3σ on offset and matching. Check stability at the worst load and feedback factor, with a step as well as a margin. Check start-up with supply ramps, fast and cold-slow. Finally, ask which known faults the benches were shown to catch.

A bench that passes everything may not be measuring what you think. Insert known faults, such as a missing R_z, a starved bias or a swapped input. A good bench fails each one with a clear reason. In the lesson, DC-level checks missed both a missing R_z and a starved bias.

Plant faults that a weak bench would miss. Remove R_z: the step settling check at speed must show ringing. Starve the bias: the input-range check at speed must fail near the top code. Swap the inputs: the open-loop sign check must fail. Each check that never fails is measuring nothing useful.

Yes. A process corner moves every transistor of a type together, the global spread between wafers. Mismatch moves each transistor alone, the local spread on one die. Offset comes mostly from mismatch, while bias currents and speed move mostly with corners. Sign-off runs corners crossed with supply and temperature, plus Monte Carlo.

Write each requirement as one line with a limit and a measurement, set after measuring a reference design at every corner. Use one bench per check. Run a supply sweep and a temperature and supply sweep for the worst case. Add an output sweep for compliance and power-up transients, fast and slow. A constant-g_m reference moves its current on purpose, so specify the tail current as a band.

A corner can push an edge of the input range past the top or bottom code. Then the buffer's tail leaves saturation at that code and the output error jumps. Choose the DAC references inside the buffer's range at speed, not just where the DC error is small. Check them at every corner.

The square law assumes constant mobility, carrier velocity proportional to field and a fixed threshold. A short device breaks all three. The vertical field degrades mobility, and carriers hit velocity saturation. Halo implants (extra doping near the source and drain) also raise the threshold. On sky130 at 1.8 V a W/L = 10 device reached 46 % of the square-law current at L = 0.15 µm and 87 % at L = 1 µm. Size short devices from their measured curves.

Plot the square root of the drain current against V_GS in saturation. A square-law device gives a straight line that crosses zero at the threshold. A bend at high V_GS shows mobility degradation and velocity saturation. The shape near the threshold shows the move into weak inversion.

Pick g_m/I_D for the trade you want: high for low current, low for speed. Then I_D is g_m divided by g_m/I_D. Read the current density I_D/W from a measured chart for that length, and get W as I_D over that density. Finally check g_m on a bench. The chart works in any inversion region, where the square law would not.

At a fixed length, g_m/I_D depends on how hard the channel is driven. The current density I_D/W captures that, not the width itself. Doubling W at the same density doubles I_D and g_m and leaves g_m/I_D unchanged. So one curve of g_m/I_D against density per length covers every width.

No. The chart holds for one length, because g_m/I_D at a given density changes with L. Take the chart for the new length and read a new density for the same g_m/I_D. A longer device gives more r_o and gain, but it adds capacitance and is slower.

High g_m/I_D, near weak inversion, gives the most transconductance per microamp. But the device is wide and slow, and its threshold mismatch becomes a larger current error. Low g_m/I_D, strong inversion, costs current but gives small, fast devices and better current matching. Input pairs often sit high for noise and offset; mirrors and fast stages sit lower.

Start with f_u and C_L, which give g_m. The current budget then gives g_m/I_D (transconductance per unit current), and a measured chart gives W. The gain sets the length, and the input range checks the tail and the load. Keep margin on f_u, because the output node carries more than C_L. Check every line at every input level the brief names.

A lot: the short NMOS current moved from -29 % to +38 % and the short PMOS from -47 % to +68 % across the corners. Heat lowers both threshold and mobility, so below the zero-temperature-coefficient bias the current rises with temperature and above it falls. Sign-off crosses corners with the supply range and both temperature ends. Check each corner's name by measurement: here sf is fast NMOS, slow PMOS, the opposite of the library comment.

The small-signal gain is -g_m(R_D ∥ r_o). Here g_m is about 0.32 mS and r_o about 63 kΩ for this short device. The measured gain is 7.3, well below g_m·R_D, because r_o is in parallel. At a fixed voltage across R_D, g_m·R_D equals (g_m/I_D)·V_RD, where g_m/I_D is transconductance per unit current. So gain is bought with voltage headroom, not current. With a load capacitor, the gain-bandwidth product is about g_m/(2πC_L), whatever R_D is.

g_m·R_D can be written as (g_m/I_D)·(I_D·R_D), and I_D·R_D is just the DC drop across the load. For a given g_m/I_D, more current with a proportionally smaller R_D gives the same gain. The supply limits that drop, which is why high-gain stages use current-source loads instead of resistors.

Intrinsic gain g_m·r_o is the most one transistor can give, with an ideal current-source load. It equals (g_m/I_D)·V_A, where g_m/I_D is transconductance per unit current. The Early voltage V_A grows with length, because the drain has less influence on a long channel. On sky130 at about 20 µA, V_A is 1.17 V at 0.15 µm and 22.8 V at 2 µm. So intrinsic gain rose from 16.7 to 131. Longer devices cost capacitance and speed.

In saturation, take the slope of the curve, g_ds, at the operating point; r_o is its inverse. Extend the tangent back to zero current: it meets the V_DS axis at -V_A, so V_A = I_D/g_ds - V_DS and r_o ≈ V_A/I_D. Do it at the bias you will use, because both change with current and voltage.

A common-gate device on top holds the lower drain nearly still. The output resistance becomes about (g_m2 + g_mb2)·r_o2·r_o1, so the top device's intrinsic gain multiplies r_o1. In the lesson that was 71 times one device at the same output voltage. The price is headroom. The output must stay above the lower drain plus the top device's V_Dsat. On a 1.8 V supply, that is the real limit.

Push the output up by a volt. The top device's r_o lets a little extra current flow, which raises the voltage at the lower drain, its source. That rise turns the top device down by g_m times the rise, cancelling most of the extra current. The output must move about g_m·r_o times further for the same current change.

A cascode device on top raises the output resistance by about (g_m + g_mb)·r_o. In the lesson it went from 0.80 MΩ to 102 MΩ. The price is headroom: the output now needs about V_GS + V_Dsat, around 0.85 V. A wide-swing version gets most of the gain back while the output can fall to about 0.3 V.

A separate diode device biases the cascode gates. It is sized so the bottom devices sit just above V_Dsat. The textbook W/4 rule comes from the square law, and in sky130 it left the copy 12 % low. A cascode on the reference side makes both bottom devices see the same V_DS and fixes the copy. Then sweep the output to find where the current is 1 % low, at every corner.

In the plain wide-swing mirror the reference device is diode-connected, so its V_DS is V_GS. The output's bottom device sits near V_Dsat instead. Different V_DS means a different current. A cascode on the reference side holds its bottom device at the same low V_DS as the output side. Then both carry the same current.

In the lesson the W/4 rule left the copy 12 % low. Short sky130 devices do not follow the square law, so the bottom devices end up at the wrong V_DS. The bias width trades output resistance against the lowest output voltage. So find it by sweeping, and check the copy at the target output range.

It feeds the output current back against the input, so the effective transconductance becomes g_m/(1 + (g_m + g_mb)R_S). Gain falls but depends less on the device, the linear input range widens and the output resistance rises. It tends to -R_D/R_S only when (g_m + g_mb)R_S is large: at 2 kΩ the lesson's stage gave 3.87 against a limit of 10.

It takes the input at the gate and the output at the source, so the output follows the input one V_GS lower. Its gain is g_m/(g_m + g_mb + g_ds), 0.841 on the lesson's bench. With the body at ground, the body effect causes most of the loss. Its output resistance is about 1/(g_m + g_mb), a few kilohms, so it drives loads a gain stage cannot.

When the source rises above the grounded body, the threshold rises too. So part of each input step goes into the extra threshold instead of moving the output. In the small-signal model that is g_mb working against g_m. A PMOS follower in its own n-well, with the well tied to its source, has no source-to-body voltage and avoids it.

The follower's own output resistance, about 1/(g_m + g_mb), forms a divider with the load. At 20 µA that is a few kilohms, so a load of similar size roughly halves the gain. More bias current raises g_m and lowers the output resistance. So a follower suits light loads, and heavy loads need a stronger output stage.

A follower is a voltage buffer: high input resistance at the gate, low output resistance at the source, gain just under one. A common-gate stage is a current buffer. Its input resistance at the source is low, about 1/(g_m + g_mb) while the load is small. Every signal current that enters leaves at the drain. That is why the common-gate stage is the top half of a cascode.

Too low, and the tail device leaves saturation, so the tail current falls. Too high, and an input device leaves saturation. The lesson's OTA ran from 0.811 V to 1.274 V. DC gain and follower error can hide the lower edge, so check the saturation margins and the tail current directly.