Interview Question · Design
Placing Macros and Sizing Channels
- Likely at Samsung
The Question
The interviewer asks
You have two hard macros and some glue logic between them. How do you place the macros, and how wide must the channel between them be?
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Reveal the Model Answer
Place macros first, usually against the core edges, with their pins facing the logic they talk to. Keep a halo (a keep-out ring with no standard cells) around them. Size the channel from the nets that must cross it. Tracks are the channel width over the layer pitch, less obstructions and power. In lesson L3.3 a 9 µm channel overflowed by 522 routing resources. A 37 µm channel, or turning the pins to the top, gave zero overflow.
Read the diagram as text
- Macro A: 39 pins facing the channel
- Channel: 9 µm wide: overflow 522
- Macro B: Pins facing the channel
- Glue logic: Talks to both macros
- Fix 1: wider channel: 37 µm: overflow 0
- Fix 2: pins turned to the top: Overflow 0, less wire
- Macro A → Channel: crossing nets
- Channel → Macro B: crossing nets
- Glue logic → Channel: more nets
- Channel → Fix 1: wider channel
- Channel → Fix 2: pins turned to the top
Size the channel from the nets that must cross it, or send those nets another way.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Mid-Level)
A good mid-level answer puts the macros at the core edges, with their pins facing the logic they talk to. It adds halos and estimates the channel tracks from its width and the layer pitch.
What Interviewers Listen For (Senior)
A good senior answer starts from the data flow and the pin count. It checks both global and detailed routing in the channel, and leaves room for buffers and power. It weighs turning the pins against widening the channel.
Cross-Questions
Where the interviewer goes next. Open a node to practise that follow-up.
WhyWhat IfProve ItCompareScale It
- Placing Macros and Sizing Channels
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WhyCounting Tracks in a ChannelL1 JuniorL2 Mid-Level
How many vertical routing tracks does a 9.175 µm channel give you on met2 and met4 in sky130?
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Reveal the Model Answer
Divide the width by each layer's pitch: met2 at 0.46 µm gives about 19 tracks and met4 at 0.92 µm about 9. Then subtract what is already used, such as power straps and pin access, and keep the router's reserve. That is far fewer than the nets two 39-pin macros want to exchange.
Self-Check
Tick each key point you covered in your answer.
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Prove ItSolve L3.3.1: Open a Route Past the MacrosSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
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CompareHalos vs Placement BlockagesL1 JuniorL2 Mid-Level
Compare a halo around a macro with a placement blockage.
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Reveal the Model Answer
A halo is a keep-out ring attached to the macro, so it moves with the macro. It keeps standard cells off the macro's edges and pin access. A blockage is a region you draw on the floorplan to keep cells, or routes, out of an area. It can be for any reason, such as a channel you want left for wires. Both cost placement area, so size them from the routing they protect.
Self-Check
Tick each key point you covered in your answer.
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What IfTurning Macro Pins Instead of Widening the ChannelL2 Mid-LevelL3 Senior
Asked if they widen the channel first
What if you cannot afford a wider channel?
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Reveal the Model Answer
Change where the nets go instead of where the channel is. In lesson L3.3, moving the macros' pins to the top edge sent the crossing nets out of the channel. Overflow fell to zero with a 4.6 µm halo, and wirelength dropped from 4981 to 3774 µm. Pin moves on a hard macro are an agreement with its owner, so raise them early.
Self-Check
Tick each key point you covered in your answer.
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Scale ItDiagnosing Routing CongestionL1 JuniorL2 Mid-Level
The global router reports the overflow below for a block with two macros and a narrow channel between them. How do you find the cause and pick a fix?
log Two hardened MACs, glue logic between them (lesson L3.3, measured global route) channel 9.175 um, halo 2.0 overflow 522 usage 18.37 % wirelength 14828 um channel 36.775 um overflow 0 wirelength 4981 um pins on top edge, halo 4.6 overflow 0 wirelength 3774 um2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
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Reveal the Model Answer
Overflow concentrated in one place, with low usage overall, points to a local cause. Here that cause is the channel, not a block that is too full. Look at where the demand comes from. It may be nets crossing the channel, pin access at the macro edges, or straps that took the tracks. The fixes act on that cause: a wider channel, pins turned away from it, or a different halo (keep-out ring). Each fix is measured by routed wirelength and timing, not by overflow alone.
Find the Cause of the Overflow FirstArrows go from the symptom to its possible causes, then to the fix that acts on each cause. Read the diagram as text
- Overflow in one channel: Usage low everywhere else
- Nets crossing the channel
- Pin access at the macro edges
- Power straps on the tracks
- Wider channel, or pins turned away
- A different halo
- Count the free tracks again
- Overflow in one channel → Nets crossing the channel
- Overflow in one channel → Pin access at the macro edges
- Overflow in one channel → Power straps on the tracks
- Nets crossing the channel → Wider channel, or pins turned away
- Pin access at the macro edges → A different halo
- Power straps on the tracks → Count the free tracks again
Judge each fix by routed wirelength and timing, not by overflow alone.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Junior)
A good junior answer reads overflow and usage together. It suspects the channel rather than a block that is too full.
What Interviewers Listen For (Senior)
A good senior answer separates three causes: crowded pin edges, a blocked passage and dense connections. It weighs a floorplan change against density settings. It checks detailed routing and extracted timing before it accepts a fix.
Misconception
"Overflow means the block is too full; lower the utilization."
Total usage here is about 18 %. The overflow is in one channel, and widening it or turning the macro pins removes all of it without touching utilization.
Source ASIC Point lesson L3.3 (measured global route)
Half-Truth
"Give the router more layers and the problem goes away."
More layers do not help pins that cannot be reached, or a channel whose nets must all cross one gap. Enabling layers without rerouting, extracting and rechecking is not a fix.
Source ASIC Point lessons L6.3 and L6.6
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WhyGlobal Routing vs Detailed RoutingL1 JuniorL2 Mid-Level
Why does a clean global route not guarantee a clean detailed route?
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Reveal the Model Answer
Global routing plans each net through coarse tiles and counts tracks per tile edge. That says nothing about how a wire reaches a pin or which vias fit. Detailed routing picks real tracks, vias and pin access under width, spacing, area and enclosure rules. It can run out of iterations and leave violations in a readable layout, so its own count matters too.
Self-Check
Tick each key point you covered in your answer.
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What IfWhat a Clean Router Count CoversL2 Mid-Level
What if the detailed router reports zero violations? Is the layout DRC clean?
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Reveal the Model Answer
Not necessarily. The router checks the rules it knows from the technology LEF, a subset of the foundry deck. Full DRC on the merged layout, with cells, fill and every rule, is a separate run. Antenna checking is separate again. Sign-off quotes which checker ran with which deck.
Self-Check
Tick each key point you covered in your answer.
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CompareDensity Knobs vs Floorplan FixesL2 Mid-LevelL3 Senior
Compare fixing congestion with placement density against fixing it in the floorplan.
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Reveal the Model Answer
Density and routability-driven placement spread cells. That helps when demand comes from local crowding. It does nothing for nets that must cross a fixed gap. Floorplan fixes, such as macro position, channel width or pin edges, change where the nets go. Density changes distances but not the netlist's connectivity, so a connectivity hot spot needs the floorplan answer.
Self-Check
Tick each key point you covered in your answer.
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Prove ItSolve L3.3.1: Open a Route Past the MacrosSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
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Scale ItRelieving Placement CongestionL2 Mid-LevelL3 Senior
The global-route map shows overflow in one corner of the block. Which remedies do you try, in what order?
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Reveal the Model Answer
Start cheap and local: lower the target density or turn on routability-driven placement, which inflates cells in crowded regions. Then look at the cause, such as a pin cluster, a wide multiplexer or a macro channel. Fix that cause with a pin plan or floorplan change. Lower utilization is the expensive last resort. Re-check timing after each step, because spreading costs wire.
Self-Check
Tick each key point you covered in your answer.
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Prove ItSolve L6.3.1: Give the Crossbar Pins RoomSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
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WhyWhy Local Congestion Fixes Come FirstL2 Mid-Level
Why try routability-driven placement before lowering the utilization of the whole block?
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Reveal the Model Answer
Routability-driven placement adds room only where the router predicts overflow. Lower utilization grows the whole block, so area and wire grow everywhere. The local fix keeps the dense, short-wired regions that had no problem. So it is the cheaper first step.
Self-Check
Tick each key point you covered in your answer.
Wrong Altitude
"Lower utilization fixes congestion, so start there."
It is the most expensive remedy, because it changes the block size and the parent floorplan. Try the local fixes first.
What People Get Wrong
Common wrong answers and why they fail.
Half-Truth
"Leave the macros in the middle so the logic can surround them."
A macro in the middle splits the standard-cell area and forces nets around it. Edge placement with pins facing the logic is the usual starting point.
Missed Corner
"A channel is wide enough if the glue cells fit."
Cells fitting is placement; the channel must also carry every net crossing it. The 9 µm channel held its 9 glue cells and still overflowed by 522.
Source ASIC Point lesson L3.3 (measured global route)