Interview Question · Project Defence
Defending a Block You Closed
The Question
The interviewer asks
Walk me through a block you took from netlist to sign-off. Cover the floorplan decisions, the hardest timing problem, and how you knew it was done.
You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
A strong answer gives the block's size, frequency, corners and constraints. Then it gives the floorplan choices with their reasons: utilization, macros, pins and grid. It tells one hard problem in detail, with the numbers before and after and what was tried that did not work. It ends with the sign-off evidence: every check, the corners covered, the open items and who accepted them.
_809_ → _825_setup check, latest arrival15 cells
- Clock latency
- Cell delay
- Wire delay
- Setup time
Read the path as a table
Launch: clk rise edge at 0.0000 ns, clock latency 0.5643 ns. Capture: clk rise edge at 6.0000 ns, latency 0.5641 ns, library setup time −0.3886 ns.
Arrival 11.7914 ns, required 6.1755 ns, slack −5.6158 ns (violated).
| Cell | Arc | Through | Edge | Delay (ns) | Time (ns) | Slew (ns) |
|---|---|---|---|---|---|---|
| 1 | _809_/CLK → _809_/Q | dfrtp_1 | fall | 1.0062 | 1.5706 | 0.2563 |
_809_/Q → _607_/A | wire acc[1] | fall | 0.0009 | 1.5715 | 0.2563 | |
| 2 | _607_/A → _607_/Y | xnor2_1 | rise | 0.6161 | 2.1876 | 0.4742 |
_607_/Y → _619_/A2 | wire _080_ | rise | 0.0001 | 2.1877 | 0.4742 | |
| 3 | _619_/A2 → _619_/Y | o21ai_0 | fall | 0.3821 | 2.5698 | 0.2084 |
_619_/Y → _641_/C | wire _081_ | fall | 0.0003 | 2.5701 | 0.2084 | |
| 4 | _641_/C → _641_/X | maj3_1 | fall | 1.0062 | 3.5762 | 0.1768 |
_641_/X → _663_/C | wire _083_ | fall | 0.0003 | 3.5765 | 0.1768 | |
| 5 | _663_/C → _663_/X | maj3_1 | fall | 0.9819 | 4.5584 | 0.1665 |
_663_/X → _685_/C | wire _085_ | fall | 0.0002 | 4.5586 | 0.1665 | |
| 6 | _685_/C → _685_/X | maj3_1 | fall | 0.9768 | 5.5354 | 0.1658 |
_685_/X → _707_/C | wire _087_ | fall | 0.0002 | 5.5357 | 0.1658 | |
| 7 | _707_/C → _707_/X | maj3_1 | fall | 1.0067 | 6.5424 | 0.1887 |
_707_/X → _727_/A1 | wire _089_ | fall | 0.0003 | 6.5427 | 0.1887 | |
| 8 | _727_/A1 → _727_/Y | a211oi_1 | rise | 0.7284 | 7.2711 | 0.6601 |
_727_/Y → _729_/A3 | wire _093_ | rise | 0.0001 | 7.2713 | 0.6601 | |
| 9 | _729_/A3 → _729_/Y | o31ai_1 | fall | 0.4130 | 7.6842 | 0.1849 |
_729_/Y → _731_/A2 | wire _095_ | fall | 0.0004 | 7.6847 | 0.1849 | |
| 10 | _731_/A2 → _731_/X | o211a_1 | fall | 0.5650 | 8.2496 | 0.0869 |
_731_/X → _734_/A3 | wire _097_ | fall | 0.0002 | 8.2498 | 0.0869 | |
| 11 | _734_/A3 → _734_/Y | o311ai_0 | rise | 1.3522 | 9.6020 | 1.4960 |
_734_/Y → _736_/A3 | wire _100_ | rise | 0.0004 | 9.6024 | 1.4960 | |
| 12 | _736_/A3 → _736_/Y | a31oi_1 | fall | 0.6989 | 10.3012 | 0.2612 |
_736_/Y → _737_/A2 | wire _101_ | fall | 0.0003 | 10.3015 | 0.2612 | |
| 13 | _737_/A2 → _737_/Y | a21oi_1 | rise | 0.6913 | 10.9928 | 0.5853 |
_737_/Y → _740_/A2 | wire _102_ | rise | 0.0003 | 10.9931 | 0.5853 | |
| 14 | _740_/A2 → _740_/Y | a211oi_1 | fall | 0.4146 | 11.4077 | 0.1967 |
_740_/Y → _669_/B | wire _105_ | fall | 0.0002 | 11.4079 | 0.1967 | |
| 15 | _669_/B → _669_/X | xor2_1 | fall | 0.3833 | 11.7913 | 0.1799 |
_669_/X → _825_/D | wire _020_ | fall | 0.0001 | 11.7914 | 0.1799 |
The report
Startpoint: _809_ (rising edge-triggered flip-flop clocked by clk)
Endpoint: _825_ (rising edge-triggered flip-flop clocked by clk)
Path Group: clk
Path Type: max
Fanout Cap Slew Delay Time Description
-------------------------------------------------------------------------------------
0.0000 0.0000 clock clk (rise edge)
0.0000 0.0000 clock source latency
1 0.0160 0.0000 0.0000 0.0000 ^ clk (in)
clk (net)
0.0004 0.0002 0.0002 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_8)
4 0.0268 0.1207 0.2264 0.2266 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_8)
clknet_0_clk (net)
0.1207 0.0008 0.2274 ^ clkbuf_2_1__f_clk/A (sky130_fd_sc_hd__clkbuf_8)
14 0.0455 0.1845 0.3349 0.5623 ^ clkbuf_2_1__f_clk/X (sky130_fd_sc_hd__clkbuf_8)
clknet_2_1__leaf_clk (net)
0.1845 0.0020 0.5643 ^ _809_/CLK (sky130_fd_sc_hd__dfrtp_1)
4 0.0327 0.2563 1.0062 1.5706 v _809_/Q (sky130_fd_sc_hd__dfrtp_1)
acc[1] (net)
0.2563 0.0009 1.5715 v _607_/A (sky130_fd_sc_hd__xnor2_1)
2 0.0076 0.4742 0.6161 2.1876 ^ _607_/Y (sky130_fd_sc_hd__xnor2_1)
_080_ (net)
0.4742 0.0001 2.1877 ^ _619_/A2 (sky130_fd_sc_hd__o21ai_0)
2 0.0092 0.2084 0.3821 2.5698 v _619_/Y (sky130_fd_sc_hd__o21ai_0)
_081_ (net)
0.2084 0.0003 2.5701 v _641_/C (sky130_fd_sc_hd__maj3_1)
2 0.0097 0.1768 1.0062 3.5762 v _641_/X (sky130_fd_sc_hd__maj3_1)
_083_ (net)
0.1768 0.0003 3.5765 v _663_/C (sky130_fd_sc_hd__maj3_1)
2 0.0087 0.1665 0.9819 4.5584 v _663_/X (sky130_fd_sc_hd__maj3_1)
_085_ (net)
0.1665 0.0002 4.5586 v _685_/C (sky130_fd_sc_hd__maj3_1)
2 0.0086 0.1658 0.9768 5.5354 v _685_/X (sky130_fd_sc_hd__maj3_1)
_087_ (net)
0.1658 0.0002 5.5357 v _707_/C (sky130_fd_sc_hd__maj3_1)
3 0.0116 0.1887 1.0067 6.5424 v _707_/X (sky130_fd_sc_hd__maj3_1)
_089_ (net)
0.1887 0.0003 6.5427 v _727_/A1 (sky130_fd_sc_hd__a211oi_1)
2 0.0068 0.6601 0.7284 7.2711 ^ _727_/Y (sky130_fd_sc_hd__a211oi_1)
_093_ (net)
0.6601 0.0001 7.2713 ^ _729_/A3 (sky130_fd_sc_hd__o31ai_1)
3 0.0116 0.1849 0.4130 7.6842 v _729_/Y (sky130_fd_sc_hd__o31ai_1)
_095_ (net)
0.1849 0.0004 7.6847 v _731_/A2 (sky130_fd_sc_hd__o211a_1)
2 0.0060 0.0869 0.5650 8.2496 v _731_/X (sky130_fd_sc_hd__o211a_1)
_097_ (net)
0.0869 0.0002 8.2498 v _734_/A3 (sky130_fd_sc_hd__o311ai_0)
3 0.0113 1.4960 1.3522 9.6020 ^ _734_/Y (sky130_fd_sc_hd__o311ai_0)
_100_ (net)
1.4960 0.0004 9.6024 ^ _736_/A3 (sky130_fd_sc_hd__a31oi_1)
2 0.0090 0.2612 0.6989 10.3012 v _736_/Y (sky130_fd_sc_hd__a31oi_1)
_101_ (net)
0.2612 0.0003 10.3015 v _737_/A2 (sky130_fd_sc_hd__a21oi_1)
3 0.0118 0.5853 0.6913 10.9928 ^ _737_/Y (sky130_fd_sc_hd__a21oi_1)
_102_ (net)
0.5853 0.0003 10.9931 ^ _740_/A2 (sky130_fd_sc_hd__a211oi_1)
4 0.0126 0.1967 0.4146 11.4077 v _740_/Y (sky130_fd_sc_hd__a211oi_1)
_105_ (net)
0.1967 0.0002 11.4079 v _669_/B (sky130_fd_sc_hd__xor2_1)
1 0.0027 0.1799 0.3833 11.7913 v _669_/X (sky130_fd_sc_hd__xor2_1)
_020_ (net)
0.1799 0.0001 11.7914 v _825_/D (sky130_fd_sc_hd__dfrtp_1)
11.7914 data arrival time
6.0000 6.0000 clock clk (rise edge)
0.0000 6.0000 clock source latency
1 0.0160 0.0000 0.0000 6.0000 ^ clk (in)
clk (net)
0.0004 0.0002 6.0002 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_8)
4 0.0268 0.1207 0.2264 6.2266 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_8)
clknet_0_clk (net)
0.1207 0.0007 6.2274 ^ clkbuf_2_2__f_clk/A (sky130_fd_sc_hd__clkbuf_8)
14 0.0452 0.1827 0.3333 6.5607 ^ clkbuf_2_2__f_clk/X (sky130_fd_sc_hd__clkbuf_8)
clknet_2_2__leaf_clk (net)
0.1828 0.0034 6.5641 ^ _825_/CLK (sky130_fd_sc_hd__dfrtp_1)
0.0000 6.5641 clock reconvergence pessimism
-0.3886 6.1755 library setup time
6.1755 data required time
-------------------------------------------------------------------------------------
6.1755 data required time
-11.7914 data arrival time
-------------------------------------------------------------------------------------
-5.6158 slack (VIOLATED)The kind of evidence a defence needs: one real path, its numbers, and the check that found it.
Self-Check
Tick each key point you covered in your answer.
What Interviewers Listen For (Mid-Level)
A good mid-level answer tells a structured story with real numbers. It quotes the WNS (worst negative slack) at each stage, the fix that worked and the fix that did not.
What Interviewers Listen For (Senior)
A good senior answer explains the trade-offs made under schedule pressure, and what it would do differently. It says which checks were waived and why, and how the block fitted the top level.
Cross-Questions
Where the interviewer goes next. Open a node to practise that follow-up.
What IfProve ItBreak ItCompareScale It
- Defending a Block You Closed
-
Break ItA Fix That Made Things WorseL2 Mid-LevelL3 Senior
Tell me about a physical-design change you made that made things worse. How did you find out, and what did you change in your process?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
A good story names the change, such as an upsize, a density change or a constraint edit. It gives the metric the change was meant to improve and the side effect: hold, congestion or another corner. It shows how the problem was caught, ideally by a check that ran after every change. It ends with the process fix, such as re-timing all corners after each ECO.
Self-Check
Tick each key point you covered in your answer.
-
CompareFour Checks, Four QuestionsL1 JuniorL2 Mid-Level
Compare DRC, LVS, logic equivalence and STA: which question does each one answer?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
DRC asks whether the shapes can be manufactured. LVS asks whether the shapes form the netlist you meant. Logic equivalence asks whether that netlist computes the same function as the RTL. STA asks whether it does so fast enough at every corner. A clean report in one says nothing about the other three.
Four Checks, Four QuestionsArrows show which data each check reads. Read the diagram as text
- Layout shapes
- Netlist
- RTL
- DRC: Can the shapes be made?
- LVS: Do the shapes form the netlist?
- Equivalence: Does the netlist match the RTL?
- STA: Is it fast enough at every corner?
- Layout shapes → DRC
- Layout shapes → LVS
- Netlist → LVS
- Netlist → Equivalence
- RTL → Equivalence
- Netlist → STA
A clean report from one check says nothing about the other three.
Self-Check
Tick each key point you covered in your answer.
-
What IfEquivalence Run on an Old NetlistL2 Mid-Level
What if LVS passes on the final layout, but equivalence was last run before the final ECO?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Then nothing ties the shipped layout to the RTL. LVS shows that the layout matches the post-ECO netlist. But that netlist was never compared with the RTL. Rerun equivalence on the final netlist, because every check must use the same final data.
Self-Check
Tick each key point you covered in your answer.
Misconception
"LVS passed on the final layout, so the logic is right."
LVS compares the layout with a netlist. It never checks that netlist against the RTL.
Source Lesson L7.5 key points
-
Prove ItSolve L8.4.1: Reject an Overstated DatasheetSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
-
Scale ItRunning the Sign-Off ReviewL3 SeniorL4 Staff
You chair the final sign-off review for a block. What must you see before you sign?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
Every check, run on one final netlist and layout. That means timing in all modes and corners, and IR, EM, DRC, LVS, antenna and equivalence. Each comes with its inputs, tool versions and pass criteria. Anything not run or waived is listed as open with an owner. A later change of geometry or logic invalidates the results it touches, so they are re-run, not carried over.
One Final Revision Feeds Distinct ChecksMatching views preserve the relationship between implementation and results. Read the diagram as text
- Final design revision
- Netlist + SPEF + SDC
- Merged layout + decks
- Review with open items
- Final design revision → Netlist + SPEF + SDC: timing views
- Final design revision → Merged layout + decks: physical views
- Netlist + SPEF + SDC → Review with open items: checks and coverage
- Merged layout + decks → Review with open items: geometry and circuit
A report from an earlier route does not certify shapes changed by a later ECO or fill operation.
Self-Check
Tick each key point you covered in your answer.
-
Prove ItSolve L8.4.1: Reject an Overstated DatasheetSimulator-graded
Show it, don't just say it: this Silicon Lab problem is graded by the simulator.
-
What IfSigning with One Check Still UnrunL3 SeniorL4 Staff
What if the schedule pushes you to sign while the IR-drop check has not been run on the final layout?
2:30You have two and a half minutes. Speak or type, then press Get Feedback under your answer. No credits needed.
Speech-to-text runs in your browser. Chrome and Edge may send audio to their own speech service.
You can edit your answer before you send it. Feedback uses AI and checks your answer only against our written answer. No credits are used and your answer is not saved.
Reveal the Model Answer
List it as open, with an owner, a date and the risk it carries. The clean reports beside it do not cover it. If the team accepts the risk, record who accepted it and why, so the tape-out record shows it. Never mark an unrun check as passed.
Self-Check
Tick each key point you covered in your answer.
Half-Truth
"Timing and DRC are clean, so IR drop is probably fine."
IR drop depends on currents and the grid, which neither check looks at. A clean report in one area says nothing about another.
Source Lesson L7.6 key points
What People Get Wrong
Common wrong answers and why they fail.
Delivery
Recites the flow steps in order, with no numbers or decisions.
Every block goes through the same steps. The interviewer wants the decisions that were specific to this one and the evidence for them.
Buzzword Without Mechanism
Says "we closed timing" without saying at which corners and with what constraints.
Timing closure is only meaningful against named corners, modes and constraints. Leaving them out hides whether hold, fast corners or I/O were covered.
Wrong Altitude
A senior candidate who cannot say what was left open at tape-out.
Knowing and owning the residual risk is the difference between running a flow and signing it off. Examples are a waived check or an unrun corner.